)]}'
{
  "commit": "2680bb281d8020d232d80618adfce4a9ca22108f",
  "tree": "9b112115d03d694f609685137fbf4a098263a707",
  "parents": [
    "cfca199280b469f03950d4c59fac8bb308e41f99"
  ],
  "author": {
    "name": "Tor Jeremiassen",
    "email": "torerik@google.com",
    "time": "Wed Sep 25 10:45:06 2024 -0700"
  },
  "committer": {
    "name": "Tor Jeremiassen",
    "email": "torerik@google.com",
    "time": "Tue Oct 01 13:03:11 2024 -0700"
  },
  "message": "This adds a cache class that can be used as part of the memory hierarchy.\n\nAs an example, an instruction cache is added (with an optional flag) to\nmpact_riscv and mpact_cheriot.\n\nPiperOrigin-RevId: 678760853\nChange-Id: Iccbe311bf7478ee79b38996d35b7101a45ae304f\n",
  "tree_diff": [
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      "old_mode": 33188,
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      "new_mode": 33188,
      "new_path": "cheriot/BUILD"
    },
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      "old_path": "cheriot/cheriot_top.h",
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}