No public description

PiperOrigin-RevId: 637938358
Change-Id: If5f5dc906f46565e4233580553263594231aa091

cheriot/cheriot_register.cc

diff --git a/cheriot/cheriot_register.cc b/cheriot/cheriot_register.cc
index af76381..d4c64f3 100644
--- a/cheriot/cheriot_register.cc
+++ b/cheriot/cheriot_register.cc
@@ -294,6 +294,7 @@
   raw_ = compressed;
   is_dirty_ = false;
   is_null_ = false;
+  raw_ = compressed;
 }
 
 void CheriotRegister::Validate() {

cheriot/cheriot_state.cc

diff --git a/cheriot/cheriot_state.cc b/cheriot/cheriot_state.cc
index 95c795e..49e8183 100644
--- a/cheriot/cheriot_state.cc
+++ b/cheriot/cheriot_state.cc
@@ -655,6 +655,7 @@
   // Update the PC from the mtvec_ capability. Update the address in case of
   // vectored mode.
   pcc()->CopyFrom(*mtcc_);
+  pcc()->set_address(trap_target);
   set_branch(true);
   // TODO(torerik): set next pc
   mstatus_->Submit();

cheriot/cheriot_top.cc

diff --git a/cheriot/cheriot_top.cc b/cheriot/cheriot_top.cc
index 7bdbc8d..f829a88 100644
--- a/cheriot/cheriot_top.cc
+++ b/cheriot/cheriot_top.cc
@@ -334,15 +334,16 @@
   // Step the simulator forward until the number of steps have been achieved, or
   // there is a halt request.
 
-  // This holds the value of the current pc, and post-loop, the address of
-  // the most recently executed instruction.
-  uint64_t pc;
+  // Clear the halt reason.
+  halt_reason_ = *HaltReason::kNone;
   // At the top of the loop this holds the address of the instruction to be
   // executed next. Post-loop it holds the address of the next instruction to
   // be executed.
   uint64_t next_pc = pcc_->data_buffer()->Get<uint32_t>(0);
+  // This holds the value of the current pc, and post-loop, the address of
+  // the most recently executed instruction.
+  uint64_t pc = next_pc;
   while (!halted_ && (count < num)) {
-    pc = next_pc;
     SetPc(pc);
     auto *inst = cheriot_decode_cache_->GetDecodedInstruction(pc);
     // Set the next_pc to the next sequential instruction.
@@ -377,7 +378,10 @@
         halt_reason_ = *HaltReason::kHardwareBreakpoint;
       }
     }
-    if (!halted_) continue;
+    if (!halted_) {
+      pc = next_pc;
+      continue;
+    }
     // If it's an action point, just step over and continue.
     if (halt_reason_ == *HaltReason::kActionPoint) {
       auto status = StepPastBreakpoint();
@@ -420,6 +424,7 @@
     if (!status.ok()) return status;
   }
   run_status_ = RunStatus::kRunning;
+  halt_reason_ = *HaltReason::kNone;
   halted_ = false;
 
   // The simulator is now run in a separate thread so as to allow a user
@@ -428,15 +433,14 @@
   run_halted_ = new absl::Notification();
   // The thread is detached so it executes without having to be joined.
   std::thread([this]() {
-    // This holds the value of the current pc, and post-loop, the address of
-    // the most recently executed instruction.
-    uint64_t pc;
     // At the top of the loop this holds the address of the instruction to be
     // executed next. Post-loop it holds the address of the next instruction to
     // be executed.
     uint64_t next_pc = pcc_->data_buffer()->Get<uint32_t>(0);
+    // This holds the value of the current pc, and post-loop, the address of
+    // the most recently executed instruction.
+    uint64_t pc = next_pc;
     while (!halted_) {
-      pc = next_pc;
       auto *inst = cheriot_decode_cache_->GetDecodedInstruction(pc);
       SetPc(pc);
       // Set the PC destination operand to next_seq_pc. Any branch that is
@@ -474,7 +478,10 @@
           halt_reason_ = *HaltReason::kHardwareBreakpoint;
         }
       }
-      if (!halted_) continue;
+      if (!halted_) {
+        pc = next_pc;
+        continue;
+      }
       // If it's an action point, just step over and continue executing, as
       // this is not a full breakpoint.
       if (halt_reason_ == *HaltReason::kActionPoint) {

cheriot/riscv_cheriot_instructions.cc

diff --git a/cheriot/riscv_cheriot_instructions.cc b/cheriot/riscv_cheriot_instructions.cc
index 09ccc3d..b97e720 100644
--- a/cheriot/riscv_cheriot_instructions.cc
+++ b/cheriot/riscv_cheriot_instructions.cc
@@ -15,7 +15,6 @@
 #include "cheriot/riscv_cheriot_instructions.h"
 
 #include <any>
-#include <bit>
 #include <cstdint>
 #include <type_traits>