Change default core version to 1.00 PiperOrigin-RevId: 719301397 Change-Id: I5acd122eb483b3f1356a236b48a29e5c40839589
diff --git a/cheriot/cheriot_state.h b/cheriot/cheriot_state.h index 2b082b9..31df622 100644 --- a/cheriot/cheriot_state.h +++ b/cheriot/cheriot_state.h
@@ -170,6 +170,7 @@ class CheriotState : public generic::ArchState { public: static constexpr int kVersion0Dot5 = 50; + static constexpr int kVersion1Dot0 = 100; static int constexpr kCapRegQueueSizeMask = 0x11; static constexpr uint32_t kCheriExceptionCode = 0x1c; static constexpr char kCregPrefix[] = "c"; @@ -436,8 +437,8 @@ private: InterruptCode PickInterrupt(uint32_t interrupts); // Core version. Expressed as an integer where as version * 100. Thus - // version 1.0 is 100, and 1.5 is 150. Default is 0.5 (or 50). - int core_version_ = kVersion0Dot5; + // version 1.0 is 100, and 1.5 is 150. Default is 1.0 (or 100). + int core_version_ = kVersion1Dot0; // A map from register name to entry in the mtval register. absl::flat_hash_map<std::string, uint32_t> cap_index_map_; // These are root capabilities
diff --git a/cheriot/mpact_cheriot.cc b/cheriot/mpact_cheriot.cc index edc3006..312e334 100644 --- a/cheriot/mpact_cheriot.cc +++ b/cheriot/mpact_cheriot.cc
@@ -82,7 +82,7 @@ using ::mpact::sim::util::TaggedMemoryUseProfiler; // Flat to specify core version. -ABSL_FLAG(int, core_version, 50, "Core version"); +ABSL_FLAG(int, core_version, 100, "Core version"); // Flags for specifying interactive mode. ABSL_FLAG(bool, i, false, "Interactive mode"); ABSL_FLAG(bool, interactive, false, "Interactive mode");
diff --git a/cheriot/test/riscv_cheriot_instructions_test.cc b/cheriot/test/riscv_cheriot_instructions_test.cc index bf66129..60aeb85 100644 --- a/cheriot/test/riscv_cheriot_instructions_test.cc +++ b/cheriot/test/riscv_cheriot_instructions_test.cc
@@ -100,7 +100,7 @@ constexpr int kDataSeal10 = 10; constexpr int kInstSizeNormal = 4; - +constexpr int kVersion0Dot5 = 50; constexpr int kVersion1Dot0 = 100; // Test fixture. @@ -622,6 +622,8 @@ AppendCapabilityOperands(inst(), {kC1}, {kC3}); state()->pcc()->set_address(inst()->address()); c1_reg()->set_address(0x200); + // Set core version to 0.5. + state()->set_core_version(kVersion0Dot5); // Set interrupt enable to true. state()->mstatus()->set_mie(1); state()->mstatus()->Submit(); @@ -723,6 +725,8 @@ c1_reg()->SetBounds(kInstAddress, 0x400); // Set offset. c2_reg()->set_address(0x100); + // Set core version to 0.5. + state()->set_core_version(kVersion0Dot5); // Set interrupt enable to true. state()->mstatus()->set_mie(1); state()->mstatus()->Submit();