diff --git a/riscv/riscv_bin_setters.h b/riscv/riscv_bin_setters.h
index 7c4eae7..a19a89a 100644
--- a/riscv/riscv_bin_setters.h
+++ b/riscv/riscv_bin_setters.h
@@ -66,7 +66,7 @@
         {"x12", 12}, {"x13", 13}, {"x14", 14}, {"x15", 15},
         {"s0", 8},   {"s1", 9},   {"a0", 10},  {"a1", 11},
         {"a2", 12},  {"a3", 13},  {"a4", 14},  {"a5", 15},
-};
+    };
 
 constexpr std::initializer_list<const std::pair<absl::string_view, uint64_t>>
     kFRegisterList = {
@@ -106,7 +106,7 @@
         {"d12", 12}, {"d13", 13}, {"d14", 14}, {"d15", 15},
         {"ds0", 8},  {"ds1", 9},  {"da0", 10}, {"da1", 11},
         {"da2", 12}, {"da3", 13}, {"da4", 14}, {"da5", 15},
-};
+    };
 
 // This is the initializer list for the map from CSR register names to register
 // numbers.
@@ -469,7 +469,7 @@
         {"mhpmevent29h", 0x73d},
         {"mhpmevent30h", 0x73e},
         {"mhpmevent31h", 0x73f},
-};
+    };
 
 // A helper function to convert a text string to an integer. The function takes
 // either numeric literals (hexadecimal or decimal), symbol names, or relocation
diff --git a/riscv/riscv_vector_memory_instructions.cc b/riscv/riscv_vector_memory_instructions.cc
index 6dacaef..6b18ff6 100644
--- a/riscv/riscv_vector_memory_instructions.cc
+++ b/riscv/riscv_vector_memory_instructions.cc
@@ -1014,6 +1014,17 @@
   auto data8 = data_db->Get<uint64_t>();
 
   auto* data_op = static_cast<RV32VectorSourceOperand*>(inst->Source(0));
+  int max_regs =
+      reg_mul * (num_fields - 1) + num_segments / num_elements_per_reg;
+  if (max_regs > data_op->size()) {
+    LOG(ERROR) << absl::StrCat(
+        "Reserved encoding error - register group too small (", data_op->size(),
+        ") for nf = ", num_fields, " emul =", emul,
+        " segments = ", num_segments, " el per reg = ", num_elements_per_reg,
+        " - requires ", max_regs, " registers.");
+    rv_vector->set_vector_exception();
+    return;
+  }
   uint64_t address = base_address;
   int count = 0;
   for (int segment = start; segment < num_segments; segment++) {
@@ -1106,6 +1117,18 @@
   auto data8 = data_db->Get<uint64_t>();
 
   auto* data_op = static_cast<RV32VectorSourceOperand*>(inst->Source(0));
+  int max_regs =
+      reg_mul * (num_fields - 1) + num_segments / num_elements_per_reg;
+  if (max_regs > data_op->size()) {
+    LOG(ERROR) << absl::StrCat(
+        "Reserved encoding error - register group too small (", data_op->size(),
+        ") for nf = ", num_fields, " emul =", emul,
+        " segments = ", num_segments,
+        " sew = ", rv_vector->selected_element_width(), " - requires ",
+        max_regs, " registers.");
+    rv_vector->set_vector_exception();
+    return;
+  }
   uint64_t segment_address = base_address;
   int count = 0;
   for (int segment = start; segment < num_segments; segment++) {
@@ -1160,7 +1183,7 @@
   rv_vector->clear_vstart();
 }
 
-// Vector indexted segment store. This instruction stores each segment
+// Vector indexed segment store. This instruction stores each segment
 // contiguously at an address formed by adding the index value for that
 // segment (from the index vector source operand) to the base address.
 void VsSegmentIndexed(int index_width, const Instruction* inst) {
@@ -1209,6 +1232,18 @@
   auto data8 = data_db->Get<uint64_t>();
 
   auto* data_op = static_cast<RV32VectorSourceOperand*>(inst->Source(0));
+  int max_regs =
+      reg_mul * (num_fields - 1) + num_segments / num_elements_per_reg;
+  if (max_regs > data_op->size()) {
+    LOG(ERROR) << absl::StrCat(
+        "Reserved encoding error - register group too small (", data_op->size(),
+        ") for nf = ", num_fields, " emul = ", emul,
+        " segments = ", num_segments,
+        " sew = ", rv_vector->selected_element_width(), " - requires ",
+        max_regs, " registers.");
+    rv_vector->set_vector_exception();
+    return;
+  }
   int count = 0;
   for (int segment = start; segment < num_segments; segment++) {
     // Masks are applied on a segment basis.