)]}'
{
  "commit": "649d725c2dbeded02fa92668484c318fd8f63024",
  "tree": "d4641de46785a0ecca0699e598fb83edc0f47631",
  "parents": [
    "5e27f4cb3ac96456617a0563f2e1871710d2d335"
  ],
  "author": {
    "name": "Tor Jeremiassen",
    "email": "torerik@google.com",
    "time": "Mon Dec 23 11:01:50 2024 -0800"
  },
  "committer": {
    "name": "Tor Jeremiassen",
    "email": "torerik@google.com",
    "time": "Mon Jan 06 12:56:13 2025 -0800"
  },
  "message": "This adds a model for the RiscV PLIC (Platform level interrupt controller).\n  - The PLIC is configurable with respect to number of interrupt sources\n    and target contexts.\n  - The PLIC supports both level and edge triggered interrupts.\n\nThis allows the PLIC to be modeled along side the RiscV core.\n\nPiperOrigin-RevId: 709103612\nChange-Id: I0178b84d6416cbfe0f7d18952cd36ad692ef06cb\n",
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