diff --git a/riscv/BUILD b/riscv/BUILD
index 8429369..51474ed 100644
--- a/riscv/BUILD
+++ b/riscv/BUILD
@@ -19,7 +19,7 @@
 load("@rules_cc//cc:cc_library.bzl", "cc_library")
 
 package(
-    default_applicable_licenses = ["//:license"],
+    default_applicable_licenses = ["//third_party/mpact_riscv//:license"],
     default_visibility = ["//visibility:public"],
 )
 
@@ -992,6 +992,7 @@
         ":riscv64g_bin_fmt",
         ":riscv64g_isa",
         ":riscv_getters",
+        "//util/regexp/re2",
         "@com_google_absl//absl/base:no_destructor",
         "@com_google_absl//absl/container:flat_hash_map",
         "@com_google_absl//absl/status",
@@ -999,7 +1000,6 @@
         "@com_google_absl//absl/strings",
         "@com_google_mpact-sim//mpact/sim/generic:type_helpers",
         "@com_google_mpact-sim//mpact/sim/util/asm",
-        "@com_googlesource_code_re2//:re2",
     ],
 )
 
@@ -1010,6 +1010,7 @@
     deps = [
         ":riscv64g_encoder",
         ":riscv64g_isa",
+        "//util/regexp/re2",
         "@com_github_serge1_elfio//:elfio",
         "@com_google_absl//absl/flags:flag",
         "@com_google_absl//absl/flags:parse",
@@ -1020,7 +1021,6 @@
         "@com_google_mpact-sim//mpact/sim/generic:type_helpers",
         "@com_google_mpact-sim//mpact/sim/util/asm",
         "@com_google_mpact-sim//mpact/sim/util/asm:simple_assembler",
-        "@com_googlesource_code_re2//:re2",
     ],
 )
 
@@ -1240,6 +1240,7 @@
         ":riscv_debug_interface",
         ":riscv_top",
         ":stoull_wrapper",
+        "//util/regexp/re2",
         "@com_google_absl//absl/container:btree",
         "@com_google_absl//absl/container:flat_hash_set",
         "@com_google_absl//absl/functional:any_invocable",
@@ -1251,7 +1252,6 @@
         "@com_google_mpact-sim//mpact/sim/generic:core_debug_interface",
         "@com_google_mpact-sim//mpact/sim/generic:debug_command_shell_interface",
         "@com_google_mpact-sim//mpact/sim/generic:type_helpers",
-        "@com_googlesource_code_re2//:re2",
     ],
 )
 
@@ -1300,6 +1300,7 @@
         ":riscv_fp_state",
         ":riscv_state",
         ":riscv_top",
+        "//util/regexp/re2",
         "@com_google_absl//absl/base:log_severity",
         "@com_google_absl//absl/flags:flag",
         "@com_google_absl//absl/flags:parse",
@@ -1317,7 +1318,6 @@
         "@com_google_mpact-sim//mpact/sim/util/memory",
         "@com_google_mpact-sim//mpact/sim/util/program_loader:elf_loader",
         "@com_google_protobuf//:protobuf",
-        "@com_googlesource_code_re2//:re2",
     ],
 )
 
@@ -1336,6 +1336,7 @@
         ":riscv_fp_state",
         ":riscv_state",
         ":riscv_top",
+        "//util/regexp/re2",
         "@com_google_absl//absl/base:log_severity",
         "@com_google_absl//absl/flags:flag",
         "@com_google_absl//absl/flags:parse",
@@ -1353,7 +1354,6 @@
         "@com_google_mpact-sim//mpact/sim/util/memory",
         "@com_google_mpact-sim//mpact/sim/util/program_loader:elf_loader",
         "@com_google_protobuf//:protobuf",
-        "@com_googlesource_code_re2//:re2",
     ],
 )
 
@@ -1370,6 +1370,7 @@
         ":riscv_fp_state",
         ":riscv_state",
         ":riscv_top",
+        "//util/regexp/re2",
         "@com_google_absl//absl/base:log_severity",
         "@com_google_absl//absl/flags:flag",
         "@com_google_absl//absl/flags:parse",
@@ -1386,7 +1387,6 @@
         "@com_google_mpact-sim//mpact/sim/util/memory",
         "@com_google_mpact-sim//mpact/sim/util/program_loader:elf_loader",
         "@com_google_protobuf//:protobuf",
-        "@com_googlesource_code_re2//:re2",
     ],
 )
 
@@ -1404,6 +1404,7 @@
         ":riscv_fp_state",
         ":riscv_state",
         ":riscv_top",
+        "//util/regexp/re2",
         "@com_google_absl//absl/base:log_severity",
         "@com_google_absl//absl/flags:flag",
         "@com_google_absl//absl/flags:parse",
@@ -1421,7 +1422,6 @@
         "@com_google_mpact-sim//mpact/sim/util/memory",
         "@com_google_mpact-sim//mpact/sim/util/program_loader:elf_loader",
         "@com_google_protobuf//:protobuf",
-        "@com_googlesource_code_re2//:re2",
     ],
 )
 
@@ -1468,6 +1468,7 @@
         "riscv_plic.h",
     ],
     deps = [
+        "//util/regexp/re2",
         "@com_google_absl//absl/container:btree",
         "@com_google_absl//absl/log",
         "@com_google_absl//absl/numeric:bits",
@@ -1476,7 +1477,6 @@
         "@com_google_mpact-sim//mpact/sim/generic:core",
         "@com_google_mpact-sim//mpact/sim/generic:instruction",
         "@com_google_mpact-sim//mpact/sim/util/memory",
-        "@com_googlesource_code_re2//:re2",
     ],
 )
 
@@ -1537,12 +1537,12 @@
         ":debug_command_shell",
         ":riscv_top",
         ":stoull_wrapper",
+        "//util/regexp/re2",
         "@com_google_absl//absl/functional:any_invocable",
         "@com_google_absl//absl/status",
         "@com_google_absl//absl/strings",
         "@com_google_absl//absl/strings:string_view",
         "@com_google_mpact-sim//mpact/sim/util/memory",
-        "@com_googlesource_code_re2//:re2",
     ],
 )
 
@@ -1598,7 +1598,6 @@
         "riscv32_renode.cc",
         "riscv32_renode.h",
     ],
-    # List the symbols for the functions called by renode as undefined.
     linkopts = select({
         "darwin_arm64_cpu": ["-undefined=dynamic_lookup"],
         "//conditions:default": [
@@ -1637,7 +1636,6 @@
         "riscv64_renode.cc",
         "riscv64_renode.h",
     ],
-    # List the symbols for the functions called by renode as undefined.
     linkopts = select({
         "darwin_arm64_cpu": ["-undefined=dynamic_lookup"],
         "//conditions:default": [
diff --git a/riscv/debug_command_shell.cc b/riscv/debug_command_shell.cc
index 0893446..efa41bd 100644
--- a/riscv/debug_command_shell.cc
+++ b/riscv/debug_command_shell.cc
@@ -33,10 +33,10 @@
 #include "mpact/sim/generic/core_debug_interface.h"
 #include "mpact/sim/generic/data_buffer.h"
 #include "mpact/sim/generic/type_helpers.h"
-#include "re2/re2.h"
 #include "riscv/riscv_debug_interface.h"
 #include "riscv/riscv_top.h"
 #include "riscv/stoull_wrapper.h"
+#include "util/regexp/re2/re2.h"
 
 namespace mpact {
 namespace sim {
diff --git a/riscv/debug_command_shell.h b/riscv/debug_command_shell.h
index eba421d..cba4b7f 100644
--- a/riscv/debug_command_shell.h
+++ b/riscv/debug_command_shell.h
@@ -31,7 +31,7 @@
 #include "absl/strings/string_view.h"
 #include "mpact/sim/generic/core_debug_interface.h"
 #include "mpact/sim/generic/debug_command_shell_interface.h"
-#include "re2/re2.h"
+#include "util/regexp/re2/re2.h"
 
 namespace mpact {
 namespace sim {
diff --git a/riscv/riscv64g_as_main.cc b/riscv/riscv64g_as_main.cc
index c005a5a..b452386 100644
--- a/riscv/riscv64g_as_main.cc
+++ b/riscv/riscv64g_as_main.cc
@@ -34,9 +34,9 @@
 #include "mpact/sim/util/asm/opcode_assembler_interface.h"
 #include "mpact/sim/util/asm/resolver_interface.h"
 #include "mpact/sim/util/asm/simple_assembler.h"
-#include "re2/re2.h"
 #include "riscv/riscv64g_bin_encoder_interface.h"
 #include "riscv/riscv64g_encoder.h"
+#include "util/regexp/re2/re2.h"
 
 using ::mpact::sim::riscv::isa64::RiscV64GBinEncoderInterface;
 using ::mpact::sim::riscv::isa64::Riscv64gSlotMatcher;
diff --git a/riscv/riscv_bin_setters.cc b/riscv/riscv_bin_setters.cc
index 721c345..df4fa2b 100644
--- a/riscv/riscv_bin_setters.cc
+++ b/riscv/riscv_bin_setters.cc
@@ -23,7 +23,7 @@
 #include "absl/strings/str_cat.h"
 #include "absl/strings/string_view.h"
 #include "mpact/sim/generic/type_helpers.h"
-#include "re2/re2.h"
+#include "util/regexp/re2/re2.h"
 
 namespace mpact {
 namespace sim {
diff --git a/riscv/riscv_bin_setters.h b/riscv/riscv_bin_setters.h
index 7c4eae7..9b04d63 100644
--- a/riscv/riscv_bin_setters.h
+++ b/riscv/riscv_bin_setters.h
@@ -29,8 +29,8 @@
 #include "absl/strings/string_view.h"
 #include "mpact/sim/util/asm/opcode_assembler_interface.h"
 #include "mpact/sim/util/asm/resolver_interface.h"
-#include "re2/re2.h"
 #include "riscv/riscv_getter_helpers.h"
+#include "util/regexp/re2/re2.h"
 
 // This file contains various setters for the RiscV binary encoder that is used
 // by the assembler to map from operand text strings to integer values.
diff --git a/riscv/riscv_instrumentation_control.cc b/riscv/riscv_instrumentation_control.cc
index cea4aac..66c7dc1 100644
--- a/riscv/riscv_instrumentation_control.cc
+++ b/riscv/riscv_instrumentation_control.cc
@@ -24,10 +24,10 @@
 #include "absl/strings/str_cat.h"
 #include "absl/strings/string_view.h"
 #include "mpact/sim/util/memory/memory_use_profiler.h"
-#include "re2/re2.h"
 #include "riscv/debug_command_shell.h"
 #include "riscv/riscv_top.h"
 #include "riscv/stoull_wrapper.h"
+#include "util/regexp/re2/re2.h"
 
 namespace mpact::sim::riscv {
 
diff --git a/riscv/riscv_instrumentation_control.h b/riscv/riscv_instrumentation_control.h
index 911eb08..d82c64e 100644
--- a/riscv/riscv_instrumentation_control.h
+++ b/riscv/riscv_instrumentation_control.h
@@ -21,9 +21,9 @@
 
 #include "absl/strings/string_view.h"
 #include "mpact/sim/util/memory/memory_use_profiler.h"
-#include "re2/re2.h"
 #include "riscv/debug_command_shell.h"
 #include "riscv/riscv_top.h"
+#include "util/regexp/re2/re2.h"
 
 namespace mpact::sim::riscv {
 
diff --git a/riscv/riscv_plic.cc b/riscv/riscv_plic.cc
index 0b9be95..2671ce5 100644
--- a/riscv/riscv_plic.cc
+++ b/riscv/riscv_plic.cc
@@ -22,7 +22,7 @@
 #include "absl/status/status.h"
 #include "absl/strings/str_cat.h"
 #include "absl/strings/string_view.h"
-#include "re2/re2.h"
+#include "util/regexp/re2/re2.h"
 
 namespace mpact {
 namespace sim {
diff --git a/riscv/riscv_top.cc b/riscv/riscv_top.cc
index d83ef4e..0dfaed6 100644
--- a/riscv/riscv_top.cc
+++ b/riscv/riscv_top.cc
@@ -410,7 +410,9 @@
   // The simulator is now run in a separate thread so as to allow a user
   // interface to continue operating. Allocate a new run_halted_ Notification
   // object, as they are single use only.
+  if (run_halted_ != nullptr) delete run_halted_;
   run_halted_ = new absl::Notification();
+  if (run_started_ != nullptr) delete run_started_;
   run_started_ = new absl::Notification();
   // The thread is detached so it executes without having to be joined.
   std::thread([this]() {
@@ -500,14 +502,8 @@
 }
 
 absl::Status RiscVTop::Wait() {
-  // If the simulator isn't running, then just return after deleting
-  // the notification object.
-  if (run_status_ != RunStatus::kRunning) {
-    delete run_halted_;
-    run_halted_ = nullptr;
-    return absl::OkStatus();
-  }
-
+  // If there is no notification object, just return.
+  if (run_halted_ == nullptr) return absl::OkStatus();
   // Wait for the simulator to finish - i.e., a notification on run_halted_.
   run_halted_->WaitForNotification();
   // Now delete the notification object - it is single use only.
diff --git a/riscv/rv32g_sim.cc b/riscv/rv32g_sim.cc
index a45c698..03ca5e2 100644
--- a/riscv/rv32g_sim.cc
+++ b/riscv/rv32g_sim.cc
@@ -47,7 +47,6 @@
 #include "mpact/sim/util/memory/memory_interface.h"
 #include "mpact/sim/util/memory/memory_watcher.h"
 #include "mpact/sim/util/program_loader/elf_program_loader.h"
-#include "re2/re2.h"
 #include "riscv/debug_command_shell.h"
 #include "riscv/riscv32_decoder.h"
 #include "riscv/riscv32_htif_semihost.h"
@@ -60,6 +59,7 @@
 #include "riscv/riscv_state.h"
 #include "riscv/riscv_top.h"
 #include "src/google/protobuf/text_format.h"
+#include "util/regexp/re2/re2.h"
 
 using ::mpact::sim::generic::Instruction;
 using ::mpact::sim::proto::ComponentData;
diff --git a/riscv/rv32gv_sim.cc b/riscv/rv32gv_sim.cc
index 36d52fb..9a1b6a2 100644
--- a/riscv/rv32gv_sim.cc
+++ b/riscv/rv32gv_sim.cc
@@ -47,7 +47,6 @@
 #include "mpact/sim/util/memory/memory_interface.h"
 #include "mpact/sim/util/memory/memory_watcher.h"
 #include "mpact/sim/util/program_loader/elf_program_loader.h"
-#include "re2/re2.h"
 #include "riscv/debug_command_shell.h"
 #include "riscv/riscv32_htif_semihost.h"
 #include "riscv/riscv32g_vec_decoder.h"
@@ -61,6 +60,7 @@
 #include "riscv/riscv_top.h"
 #include "riscv/riscv_vector_state.h"
 #include "src/google/protobuf/text_format.h"
+#include "util/regexp/re2/re2.h"
 
 using ::mpact::sim::generic::Instruction;
 using ::mpact::sim::proto::ComponentData;
diff --git a/riscv/rv64g_sim.cc b/riscv/rv64g_sim.cc
index fe80fcc..4193527 100644
--- a/riscv/rv64g_sim.cc
+++ b/riscv/rv64g_sim.cc
@@ -46,7 +46,6 @@
 #include "mpact/sim/util/memory/memory_interface.h"
 #include "mpact/sim/util/memory/memory_watcher.h"
 #include "mpact/sim/util/program_loader/elf_program_loader.h"
-#include "re2/re2.h"
 #include "riscv/debug_command_shell.h"
 #include "riscv/riscv64_decoder.h"
 #include "riscv/riscv_arm_semihost.h"
@@ -57,6 +56,7 @@
 #include "riscv/riscv_state.h"
 #include "riscv/riscv_top.h"
 #include "src/google/protobuf/text_format.h"
+#include "util/regexp/re2/re2.h"
 
 using ::mpact::sim::generic::Instruction;
 using ::mpact::sim::proto::ComponentData;
diff --git a/riscv/rv64gv_sim.cc b/riscv/rv64gv_sim.cc
index 2bac95d..7215928 100644
--- a/riscv/rv64gv_sim.cc
+++ b/riscv/rv64gv_sim.cc
@@ -47,7 +47,6 @@
 #include "mpact/sim/util/memory/memory_interface.h"
 #include "mpact/sim/util/memory/memory_watcher.h"
 #include "mpact/sim/util/program_loader/elf_program_loader.h"
-#include "re2/re2.h"
 #include "riscv/debug_command_shell.h"
 #include "riscv/riscv64g_vec_decoder.h"
 #include "riscv/riscv64gzb_vec_decoder.h"
@@ -60,6 +59,7 @@
 #include "riscv/riscv_top.h"
 #include "riscv/riscv_vector_state.h"
 #include "src/google/protobuf/text_format.h"
+#include "util/regexp/re2/re2.h"
 
 using ::mpact::sim::generic::Instruction;
 using ::mpact::sim::proto::ComponentData;