)]}'
{
  "commit": "4098bc2c73fbc9450c1845be6d313793fbdf5634",
  "tree": "176c9f1d2843a8fa1d83fd886506516609e0bb9b",
  "parents": [
    "0f6038b2fd419cf3aca94e7fa5a1d4cd77060deb"
  ],
  "author": {
    "name": "Tor Jeremiassen",
    "email": "torerik@google.com",
    "time": "Wed Jan 15 10:35:20 2025 -0800"
  },
  "committer": {
    "name": "Tor Jeremiassen",
    "email": "torerik@google.com",
    "time": "Thu Jan 16 14:56:20 2025 -0800"
  },
  "message": "Initial version of a RiscV64g assembler.\n\nThere will be some issues and differences between this and\nthe standard RiscV assembler to be detailed later.\n\nPiperOrigin-RevId: 715854881\nChange-Id: I233b79c96c9c4cd6cf2516486f7964ef76d87fb7\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "98c60c0b20cd3e3b5341616761dea1357b043747",
      "old_mode": 33188,
      "old_path": "mpact/sim/util/asm/simple_assembler.cc",
      "new_id": "225452b7a7fe3d665186fd42133450c3fd1cde79",
      "new_mode": 33188,
      "new_path": "mpact/sim/util/asm/simple_assembler.cc"
    }
  ]
}
