diff --git a/mpact/sim/decoder/encoding_group.h b/mpact/sim/decoder/encoding_group.h
index 9204b91..5ff661d 100644
--- a/mpact/sim/decoder/encoding_group.h
+++ b/mpact/sim/decoder/encoding_group.h
@@ -33,7 +33,7 @@
 class InstructionGroup;
 class InstructionEncoding;
 struct Constraint;
-class Field;
+struct Field;
 class Overlay;
 
 // The encoding group is a class that allows instruction encodings to be grouped
diff --git a/mpact/sim/decoder/test/testfiles/example_with_recursive_include.bin_fmt b/mpact/sim/decoder/test/testfiles/example_with_recursive_include.bin_fmt
index 9d33c41..c4ca291 100644
--- a/mpact/sim/decoder/test/testfiles/example_with_recursive_include.bin_fmt
+++ b/mpact/sim/decoder/test/testfiles/example_with_recursive_include.bin_fmt
@@ -16,9 +16,6 @@
 decoder RiscV32G {
   namespace mpact::sim::riscv::encoding;
   opcode_enum = "isa32::OpcodeEnum";
-  includes {
-    #include "third_party/mpact_riscv/riscv32g_decoder.h"
-  }
   RiscVGInst32;
   RiscVCInst16;
 };
diff --git a/mpact/sim/decoder/test/testfiles/riscv32_top.bin_fmt b/mpact/sim/decoder/test/testfiles/riscv32_top.bin_fmt
index 6eb694d..b0470d2 100644
--- a/mpact/sim/decoder/test/testfiles/riscv32_top.bin_fmt
+++ b/mpact/sim/decoder/test/testfiles/riscv32_top.bin_fmt
@@ -16,9 +16,6 @@
 decoder RiscV32G {
   namespace mpact::sim::riscv::encoding;
   opcode_enum = "isa32::OpcodeEnum";
-  includes {
-    #include "third_party/mpact_riscv/riscv32g_decoder.h"
-  }
   RiscVGInst32;
   RiscVCInst16;
 };