Initial commit for adding gdbserver to mpact-sim and vxc_sim PiperOrigin-RevId: 886288912 Change-Id: I892edae35d17a0331c962627e036d53d1e5dfcfb
diff --git a/riscv/BUILD b/riscv/BUILD index 2335955..f1ac14b 100644 --- a/riscv/BUILD +++ b/riscv/BUILD
@@ -771,7 +771,6 @@ "@abseil-cpp//absl/status", "@mpact-sim//mpact/sim/generic:core", "@mpact-sim//mpact/sim/generic:instruction", - "@mpact-sim//mpact/sim/generic:program_error", "@mpact-sim//mpact/sim/generic:type_helpers", "@mpact-sim//mpact/sim/util/memory", ], @@ -799,8 +798,6 @@ "@abseil-cpp//absl/strings", "@mpact-sim//mpact/sim/generic:core", "@mpact-sim//mpact/sim/generic:instruction", - "@mpact-sim//mpact/sim/generic:program_error", - "@mpact-sim//mpact/sim/generic:type_helpers", "@mpact-sim//mpact/sim/util/memory", ], ) @@ -916,7 +913,6 @@ "@mpact-sim//mpact/sim/generic:arch_state", "@mpact-sim//mpact/sim/generic:core", "@mpact-sim//mpact/sim/generic:instruction", - "@mpact-sim//mpact/sim/generic:program_error", "@mpact-sim//mpact/sim/generic:type_helpers", "@mpact-sim//mpact/sim/util/memory", ], @@ -944,7 +940,6 @@ "@abseil-cpp//absl/strings", "@mpact-sim//mpact/sim/generic:core", "@mpact-sim//mpact/sim/generic:instruction", - "@mpact-sim//mpact/sim/generic:program_error", "@mpact-sim//mpact/sim/generic:type_helpers", "@mpact-sim//mpact/sim/util/memory", ], @@ -972,7 +967,6 @@ "@abseil-cpp//absl/strings", "@mpact-sim//mpact/sim/generic:core", "@mpact-sim//mpact/sim/generic:instruction", - "@mpact-sim//mpact/sim/generic:program_error", "@mpact-sim//mpact/sim/generic:type_helpers", "@mpact-sim//mpact/sim/util/memory", ], @@ -1049,7 +1043,6 @@ "@mpact-sim//mpact/sim/generic:arch_state", "@mpact-sim//mpact/sim/generic:core", "@mpact-sim//mpact/sim/generic:instruction", - "@mpact-sim//mpact/sim/generic:program_error", "@mpact-sim//mpact/sim/generic:type_helpers", "@mpact-sim//mpact/sim/util/memory", ], @@ -1077,7 +1070,6 @@ "@abseil-cpp//absl/strings", "@mpact-sim//mpact/sim/generic:core", "@mpact-sim//mpact/sim/generic:instruction", - "@mpact-sim//mpact/sim/generic:program_error", "@mpact-sim//mpact/sim/generic:type_helpers", "@mpact-sim//mpact/sim/util/memory", ], @@ -1592,6 +1584,32 @@ ], ) +cc_library( + name = "riscv_zc_getters", + hdrs = ["riscv_zc_getters.h"], + deps = [ + ":riscv_encoding_common", + ":riscv_getters", + ":riscv_state", + "@abseil-cpp//absl/strings", + "@mpact-sim//mpact/sim/generic:core", + ], +) + +cc_library( + name = "riscv_b_instructions", + srcs = ["riscv_b_instructions.cc"], + hdrs = ["riscv_b_instructions.h"], + deps = [ + ":riscv_g", + ":riscv_state", + "@abseil-cpp//absl/base", + "@abseil-cpp//absl/numeric:bits", + "@abseil-cpp//absl/types:span", + "@mpact-sim//mpact/sim/generic:instruction", + ], +) + cc_binary( name = "renode_mpact_riscv32", srcs = [
diff --git a/riscv/riscv_debug_interface.h b/riscv/riscv_debug_interface.h index 4fc0d85..946b957 100644 --- a/riscv/riscv_debug_interface.h +++ b/riscv/riscv_debug_interface.h
@@ -17,7 +17,6 @@ #ifndef THIRD_PARTY_MPACT_RISCV_RISCV_DEBUG_INTERFACE_H_ #define THIRD_PARTY_MPACT_RISCV_RISCV_DEBUG_INTERFACE_H_ -#include <cstddef> #include <cstdint> #include "absl/functional/any_invocable.h" @@ -33,14 +32,6 @@ public: ~RiscVDebugInterface() override = default; - // Set a data watchpoint for the given memory range. Any access matching the - // given access type (load/store) will halt execution following the completion - // of that access. - virtual absl::Status SetDataWatchpoint(uint64_t address, size_t length, - AccessType access_type) = 0; - // Clear data watchpoint for the given memory address and access type. - virtual absl::Status ClearDataWatchpoint(uint64_t address, - AccessType access_type) = 0; // Set an action point at the given address to execute the specified action. virtual absl::StatusOr<int> SetActionPoint( uint64_t address, absl::AnyInvocable<void(uint64_t, int)> action) = 0;