No public description PiperOrigin-RevId: 727035909 Change-Id: Ia4377773d2fe98b9206d2c488d96cafe6edea23f

diff --git a/riscv/riscv32g_encoding.cc b/riscv/riscv32g_encoding.cc
index 3ac5fa4..34b155f 100644
--- a/riscv/riscv32g_encoding.cc
+++ b/riscv/riscv32g_encoding.cc

@@ -410,7 +410,7 @@
   dest_op_getters_.insert(
       std::make_pair(static_cast<int>(DestOpEnum::kC3rd), [this](int latency) {
         int num = encoding::inst16_format::ExtractClRd(inst_word_);
-        return GetRegisterDestinationOp<RVFpRegister>(
+        return GetRegisterDestinationOp<RV32Register>(
             state_, absl::StrCat(RiscVState::kXregPrefix, num), latency);
       }));
   dest_op_getters_.insert(
@@ -450,7 +450,7 @@
                          return GetRegisterDestinationOp<RV32Register>(
                              state_, "X0Dest", 0, xreg_alias_[0]);
                        } else {
-                         return GetRegisterDestinationOp<RVFpRegister>(
+                         return GetRegisterDestinationOp<RV32Register>(
                              state_, absl::StrCat(RiscVState::kXregPrefix, num),
                              latency, xreg_alias_[num]);
                        }

diff --git a/riscv/test/BUILD b/riscv/test/BUILD
index 4ea63fe..6aaf46a 100644
--- a/riscv/test/BUILD
+++ b/riscv/test/BUILD

@@ -515,6 +515,7 @@
         "@com_google_absl//absl/strings",
         "@com_google_googletest//:gtest_main",
         "@com_google_mpact-sim//mpact/sim/generic:instruction",
+        "@com_google_mpact-sim//mpact/sim/generic:type_helpers",
     ],
 )
 

diff --git a/riscv/test/riscv_fp_test_base.h b/riscv/test/riscv_fp_test_base.h
index f427a52..fb115c5 100644
--- a/riscv/test/riscv_fp_test_base.h
+++ b/riscv/test/riscv_fp_test_base.h

@@ -439,7 +439,16 @@
     const std::string kRdName = absl::StrCat(reg_prefixes[1], 5);
     // This is used for the rounding mode operand.
     const std::string kRmName = absl::StrCat("x", 10);
-    AppendRegisterOperands<RVFpRegister>({kR1Name}, {kRdName});
+    if (kR1Name[0] == 'x') {
+      AppendRegisterOperands<RV32Register>({kR1Name}, {});
+    } else {
+      AppendRegisterOperands<RVFpRegister>({kR1Name}, {});
+    }
+    if (kRdName[0] == 'x') {
+      AppendRegisterOperands<RV32Register>({}, {kRdName});
+    } else {
+      AppendRegisterOperands<RVFpRegister>({}, {kRdName});
+    }
     AppendRegisterOperands<RV32Register>({kRmName}, {});
     FillArrayWithRandomFPValues<LHS>(lhs_span);
     using LhsInt = typename FPTypeInfo<LHS>::IntType;
@@ -491,7 +500,16 @@
     const std::string kRdName = absl::StrCat(reg_prefixes[1], 5);
     // This is used for the rounding mode operand.
     const std::string kRmName = absl::StrCat("x", 10);
-    AppendRegisterOperands<RVFpRegister>({kR1Name, kRmName}, {kRdName});
+    if (kR1Name[0] == 'x') {
+      AppendRegisterOperands<RV32Register>({kR1Name}, {});
+    } else {
+      AppendRegisterOperands<RVFpRegister>({kR1Name}, {});
+    }
+    if (kRdName[0] == 'x') {
+      AppendRegisterOperands<RV32Register>({}, {kRdName});
+    } else {
+      AppendRegisterOperands<RVFpRegister>({}, {kRdName});
+    }
     AppendRegisterOperands<RV32Register>({kRmName}, {});
     auto *flag_op = rv_fp_->fflags()->CreateSetDestinationOperand(0, "fflags");
     instruction_->AppendDestination(flag_op);
@@ -557,7 +575,21 @@
     const std::string kRdName = absl::StrCat(reg_prefixes[2], 5);
     // This is used for the rounding mode operand.
     const std::string kRmName = absl::StrCat("x", 10);
-    AppendRegisterOperands<RVFpRegister>({kR1Name, kR2Name}, {kRdName});
+    if (kR1Name[0] == 'x') {
+      AppendRegisterOperands<RV32Register>({kR1Name}, {});
+    } else {
+      AppendRegisterOperands<RVFpRegister>({kR1Name}, {});
+    }
+    if (kR2Name[0] == 'x') {
+      AppendRegisterOperands<RV32Register>({kR2Name}, {});
+    } else {
+      AppendRegisterOperands<RVFpRegister>({kR2Name}, {});
+    }
+    if (kRdName[0] == 'x') {
+      AppendRegisterOperands<RV32Register>({}, {kRdName});
+    } else {
+      AppendRegisterOperands<RVFpRegister>({}, {kRdName});
+    }
     AppendRegisterOperands<RV32Register>({kRmName}, {});
     auto *flag_op = rv_fp_->fflags()->CreateSetDestinationOperand(0, "fflags");
     instruction_->AppendDestination(flag_op);
@@ -620,7 +652,21 @@
     const std::string kRdName = absl::StrCat(reg_prefixes[2], 5);
     // This is used for the rounding mode operand.
     const std::string kRmName = absl::StrCat("x", 10);
-    AppendRegisterOperands<RVFpRegister>({kR1Name, kR2Name}, {kRdName});
+    if (kR1Name[0] == 'x') {
+      AppendRegisterOperands<RV32Register>({kR1Name}, {});
+    } else {
+      AppendRegisterOperands<RVFpRegister>({kR1Name}, {});
+    }
+    if (kR2Name[0] == 'x') {
+      AppendRegisterOperands<RV32Register>({kR2Name}, {});
+    } else {
+      AppendRegisterOperands<RVFpRegister>({kR2Name}, {});
+    }
+    if (kRdName[0] == 'x') {
+      AppendRegisterOperands<RV32Register>({}, {kRdName});
+    } else {
+      AppendRegisterOperands<RVFpRegister>({}, {kRdName});
+    }
     AppendRegisterOperands<RV32Register>({kRmName}, {});
     auto *flag_op = rv_fp_->fflags()->CreateSetDestinationOperand(0, "fflags");
     instruction_->AppendDestination(flag_op);
@@ -690,8 +736,26 @@
     const std::string kRdName = absl::StrCat(reg_prefixes[3], 5);
     // This is used for the rounding mode operand.
     const std::string kRmName = absl::StrCat("x", 10);
-    AppendRegisterOperands<RVFpRegister>({kR1Name, kR2Name, kR3Name},
-                                         {kRdName});
+    if (kR1Name[0] == 'x') {
+      AppendRegisterOperands<RV32Register>({kR1Name}, {});
+    } else {
+      AppendRegisterOperands<RVFpRegister>({kR1Name}, {});
+    }
+    if (kR2Name[0] == 'x') {
+      AppendRegisterOperands<RV32Register>({kR2Name}, {});
+    } else {
+      AppendRegisterOperands<RVFpRegister>({kR2Name}, {});
+    }
+    if (kR3Name[0] == 'x') {
+      AppendRegisterOperands<RV32Register>({kR3Name}, {});
+    } else {
+      AppendRegisterOperands<RVFpRegister>({kR3Name}, {});
+    }
+    if (kRdName[0] == 'x') {
+      AppendRegisterOperands<RV32Register>({}, {kRdName});
+    } else {
+      AppendRegisterOperands<RVFpRegister>({}, {kRdName});
+    }
     AppendRegisterOperands<RV32Register>({kRmName}, {});
     FillArrayWithRandomFPValues<LHS>(lhs_span);
     FillArrayWithRandomFPValues<MHS>(mhs_span);
@@ -753,8 +817,26 @@
     const std::string kRdName = absl::StrCat(reg_prefixes[3], 5);
     // This is used for the rounding mode operand.
     const std::string kRmName = absl::StrCat("x", 10);
-    AppendRegisterOperands<RVFpRegister>({kR1Name, kR2Name, kR3Name},
-                                         {kRdName});
+    if (kR1Name[0] == 'x') {
+      AppendRegisterOperands<RV32Register>({kR1Name}, {});
+    } else {
+      AppendRegisterOperands<RVFpRegister>({kR1Name}, {});
+    }
+    if (kR2Name[0] == 'x') {
+      AppendRegisterOperands<RV32Register>({kR2Name}, {});
+    } else {
+      AppendRegisterOperands<RVFpRegister>({kR2Name}, {});
+    }
+    if (kR3Name[0] == 'x') {
+      AppendRegisterOperands<RV32Register>({kR3Name}, {});
+    } else {
+      AppendRegisterOperands<RVFpRegister>({kR3Name}, {});
+    }
+    if (kRdName[0] == 'x') {
+      AppendRegisterOperands<RV32Register>({}, {kRdName});
+    } else {
+      AppendRegisterOperands<RVFpRegister>({}, {kRdName});
+    }
     AppendRegisterOperands<RV32Register>({kRmName}, {});
     auto *flag_op = rv_fp_->fflags()->CreateSetDestinationOperand(0, "fflags");
     instruction_->AppendDestination(flag_op);

diff --git a/riscv/test/riscv_vector_basic_bit_manipulation_test.cc b/riscv/test/riscv_vector_basic_bit_manipulation_test.cc
index 7ddd73d..96f4843 100644
--- a/riscv/test/riscv_vector_basic_bit_manipulation_test.cc
+++ b/riscv/test/riscv_vector_basic_bit_manipulation_test.cc

@@ -43,6 +43,8 @@
 using ::mpact::sim::riscv::Vwsll;
 using ::mpact::sim::riscv::test::RiscVVectorInstructionsTestBase;
 
+using RVScalarRegister = ::mpact::sim::riscv::RV32Register;
+
 class RiscVVectorBasicBitManipulationTest
     : public RiscVVectorInstructionsTestBase {};
 
@@ -61,7 +63,7 @@
 template <typename T>
 inline void VandnVXHelper(RiscVVectorBasicBitManipulationTest *tester) {
   tester->SetSemanticFunction(&Vandn);
-  tester->BinaryOpTestHelperVX<T, T, T>(
+  tester->BinaryOpTestHelperVX<T, T, T, RVScalarRegister>(
       absl::StrCat("Vandn", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T rs1) -> T { return ~rs1 & vs2; });
 }
@@ -143,7 +145,7 @@
 template <typename T>
 inline void VrolVXHelper(RiscVVectorBasicBitManipulationTest *tester) {
   tester->SetSemanticFunction(&Vrol);
-  tester->BinaryOpTestHelperVX<T, T, T>(
+  tester->BinaryOpTestHelperVX<T, T, T, RVScalarRegister>(
       absl::StrCat("Vrol", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T rs1) -> T {
         T bitsize = sizeof(T) * 8;
@@ -278,7 +280,7 @@
 inline void VwsllVXHelper(RiscVVectorBasicBitManipulationTest *tester) {
   using WT = typename WideType<T>::type;
   tester->SetSemanticFunction(&Vwsll);
-  tester->BinaryOpTestHelperVV<WT, T, T>(
+  tester->BinaryOpTestHelperVX<WT, T, T, RVScalarRegister>(
       absl::StrCat("Vwsll", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T rs1) -> WT {
         T shift_mask = 2 * 8 * sizeof(T) - 1;

diff --git a/riscv/test/riscv_vector_fp_compare_instructions_test.cc b/riscv/test/riscv_vector_fp_compare_instructions_test.cc
index 7ef13c2..58de677 100644
--- a/riscv/test/riscv_vector_fp_compare_instructions_test.cc
+++ b/riscv/test/riscv_vector_fp_compare_instructions_test.cc

@@ -228,7 +228,7 @@
     Vs2 vs2_value[vs2_size * 8];
     auto vs2_span = Span<Vs2>(vs2_value);
     AppendVectorRegisterOperands({kVs2}, {});
-    AppendRegisterOperands<Fs1>({kFs1Name}, {});
+    AppendRegisterOperands<RVFpRegister>({kFs1Name}, {});
     AppendVectorRegisterOperands({kVmask}, {kVd});
     // Initialize input values.
     FillArrayWithRandomValues<Vs2>(vs2_span);

diff --git a/riscv/test/riscv_vector_fp_instructions_test.cc b/riscv/test/riscv_vector_fp_instructions_test.cc
index c23519c..cf123c6 100644
--- a/riscv/test/riscv_vector_fp_instructions_test.cc
+++ b/riscv/test/riscv_vector_fp_instructions_test.cc

@@ -39,6 +39,7 @@
 
 using Instruction = ::mpact::sim::generic::Instruction;
 using ::mpact::sim::generic::operator*;  // NOLINT: used below.
+using RVScalarRegister = ::mpact::sim::riscv::RVFpRegister;
 
 // Functions to test.
 using ::mpact::sim::riscv::Vfadd;
@@ -515,12 +516,12 @@
   // Vector-scalar.
   ResetInstruction();
   SetSemanticFunction(&Vfadd);
-  BinaryOpFPTestHelperVX<float, float, float>(
+  BinaryOpFPTestHelperVX<float, float, float, RVScalarRegister>(
       "Vfadd_vx32", /*sew*/ 32, instruction_, /*delta_position*/ 32,
       [](float vs2, float vs1) -> float { return vs2 + vs1; });
   ResetInstruction();
   SetSemanticFunction(&Vfadd);
-  BinaryOpFPTestHelperVX<double, double, double>(
+  BinaryOpFPTestHelperVX<double, double, double, RVScalarRegister>(
       "Vfadd_vx64", /*sew*/ 64, instruction_, /*delta_position*/ 64,
       [](double vs2, double vs1) -> double { return vs2 + vs1; });
 }
@@ -540,12 +541,12 @@
   // Vector-scalar.
   ResetInstruction();
   SetSemanticFunction(&Vfsub);
-  BinaryOpFPTestHelperVX<float, float, float>(
+  BinaryOpFPTestHelperVX<float, float, float, RVScalarRegister>(
       "Vfsub_vx32", /*sew*/ 32, instruction_, /*delta_position*/ 32,
       [](float vs2, float vs1) -> float { return vs2 - vs1; });
   ResetInstruction();
   SetSemanticFunction(&Vfsub);
-  BinaryOpFPTestHelperVX<double, double, double>(
+  BinaryOpFPTestHelperVX<double, double, double, RVScalarRegister>(
       "Vfsub_vx64", /*sew*/ 64, instruction_, /*delta_position*/ 64,
       [](double vs2, double vs1) -> double { return vs2 - vs1; });
 }
@@ -565,12 +566,12 @@
   // Vector-scalar.
   ResetInstruction();
   SetSemanticFunction(&Vfrsub);
-  BinaryOpFPTestHelperVX<float, float, float>(
+  BinaryOpFPTestHelperVX<float, float, float, RVScalarRegister>(
       "Vfrsub_vx32", /*sew*/ 32, instruction_, /*delta_position*/ 32,
       [](float vs2, float vs1) -> float { return vs1 - vs2; });
   ResetInstruction();
   SetSemanticFunction(&Vfrsub);
-  BinaryOpFPTestHelperVX<double, double, double>(
+  BinaryOpFPTestHelperVX<double, double, double, RVScalarRegister>(
       "Vfrsub_vx64", /*sew*/ 64, instruction_, /*delta_position*/ 64,
       [](double vs2, double vs1) -> double { return vs1 - vs2; });
 }
@@ -587,7 +588,7 @@
   // Vector-scalar.
   ResetInstruction();
   SetSemanticFunction(&Vfwadd);
-  BinaryOpFPTestHelperVX<double, float, float>(
+  BinaryOpFPTestHelperVX<double, float, float, RVScalarRegister>(
       "Vfwadd_vx32", /*sew*/ 32, instruction_, /*delta_position*/ 32,
       [](float vs2, float vs1) -> double {
         return static_cast<double>(vs2) + static_cast<double>(vs1);
@@ -606,7 +607,7 @@
   // Vector-scalar.
   ResetInstruction();
   SetSemanticFunction(&Vfwsub);
-  BinaryOpFPTestHelperVX<double, float, float>(
+  BinaryOpFPTestHelperVX<double, float, float, RVScalarRegister>(
       "Vfwsub_vx32", /*sew*/ 32, instruction_, /*delta_position*/ 32,
       [](float vs2, float vs1) -> double {
         return static_cast<double>(vs2) - static_cast<double>(vs1);
@@ -625,7 +626,7 @@
   // Vector-scalar.
   ResetInstruction();
   SetSemanticFunction(&Vfwaddw);
-  BinaryOpFPTestHelperVX<double, double, float>(
+  BinaryOpFPTestHelperVX<double, double, float, RVScalarRegister>(
       "Vfwaddw_vx32", /*sew*/ 32, instruction_, /*delta_position*/ 32,
       [](double vs2, float vs1) -> double {
         return vs2 + static_cast<double>(vs1);
@@ -644,7 +645,7 @@
   // Vector-scalar.
   ResetInstruction();
   SetSemanticFunction(&Vfwsubw);
-  BinaryOpFPTestHelperVX<double, double, float>(
+  BinaryOpFPTestHelperVX<double, double, float, RVScalarRegister>(
       "Vfwsubw_vx32", /*sew*/ 32, instruction_, /*delta_position*/ 32,
       [](double vs2, float vs1) -> double {
         return vs2 - static_cast<double>(vs1);
@@ -666,12 +667,12 @@
   // Vector-scalar.
   ResetInstruction();
   SetSemanticFunction(&Vfmul);
-  BinaryOpFPTestHelperVX<float, float, float>(
+  BinaryOpFPTestHelperVX<float, float, float, RVScalarRegister>(
       "Vfmul_vx32", /*sew*/ 32, instruction_, /*delta_position*/ 32,
       [](float vs2, float vs1) -> float { return vs2 * vs1; });
   ResetInstruction();
   SetSemanticFunction(&Vfmul);
-  BinaryOpFPTestHelperVX<double, double, double>(
+  BinaryOpFPTestHelperVX<double, double, double, RVScalarRegister>(
       "Vfmul_vx64", /*sew*/ 64, instruction_, /*delta_position*/ 64,
       [](double vs2, double vs1) -> double { return vs2 * vs1; });
 }
@@ -691,12 +692,12 @@
   // Vector-scalar.
   ResetInstruction();
   SetSemanticFunction(&Vfdiv);
-  BinaryOpFPTestHelperVX<float, float, float>(
+  BinaryOpFPTestHelperVX<float, float, float, RVScalarRegister>(
       "Vfdiv_vx32", /*sew*/ 32, instruction_, /*delta_position*/ 32,
       [](float vs2, float vs1) -> float { return vs2 / vs1; });
   ResetInstruction();
   SetSemanticFunction(&Vfdiv);
-  BinaryOpFPTestHelperVX<double, double, double>(
+  BinaryOpFPTestHelperVX<double, double, double, RVScalarRegister>(
       "Vfdiv_vx64", /*sew*/ 64, instruction_, /*delta_position*/ 64,
       [](double vs2, double vs1) -> double { return vs2 / vs1; });
 }
@@ -716,12 +717,12 @@
   // Vector-scalar.
   ResetInstruction();
   SetSemanticFunction(&Vfrdiv);
-  BinaryOpFPTestHelperVX<float, float, float>(
+  BinaryOpFPTestHelperVX<float, float, float, RVScalarRegister>(
       "Vfrdiv_vx32", /*sew*/ 32, instruction_, /*delta_position*/ 32,
       [](float vs2, float vs1) -> float { return vs1 / vs2; });
   ResetInstruction();
   SetSemanticFunction(&Vfrdiv);
-  BinaryOpFPTestHelperVX<double, double, double>(
+  BinaryOpFPTestHelperVX<double, double, double, RVScalarRegister>(
       "Vfrdiv_vx64", /*sew*/ 64, instruction_, /*delta_position*/ 64,
       [](double vs2, double vs1) -> double { return vs1 / vs2; });
 }
@@ -738,7 +739,7 @@
   // Vector-scalar.
   ResetInstruction();
   SetSemanticFunction(&Vfwmul);
-  BinaryOpFPTestHelperVX<double, float, float>(
+  BinaryOpFPTestHelperVX<double, float, float, RVScalarRegister>(
       "Vfwmul_vx32", /*sew*/ 32, instruction_, /*delta_position*/ 32,
       [](float vs2, float vs1) -> double {
         return static_cast<double>(vs2) * static_cast<double>(vs1);
@@ -1146,7 +1147,7 @@
   // Vector-scalar.
   ResetInstruction();
   SetSemanticFunction(&Vfsgnj);
-  BinaryOpFPTestHelperVX<float, float, float>(
+  BinaryOpFPTestHelperVX<float, float, float, RVScalarRegister>(
       "Vfsgnj_vx32", /*sew*/ 32, instruction_, /*delta_position*/ 32,
       [](float vs2, float vs1) -> float {
         using Int = typename FPTypeInfo<float>::IntType;
@@ -1156,7 +1157,7 @@
       });
   ResetInstruction();
   SetSemanticFunction(&Vfsgnj);
-  BinaryOpFPTestHelperVX<double, double, double>(
+  BinaryOpFPTestHelperVX<double, double, double, RVScalarRegister>(
       "Vfsgnj_vx64", /*sew*/ 64, instruction_, /*delta_position*/ 64,
       [](double vs2, double vs1) -> double {
         using Int = typename FPTypeInfo<double>::IntType;
@@ -1191,7 +1192,7 @@
   // Vector-scalar.
   ResetInstruction();
   SetSemanticFunction(&Vfsgnjn);
-  BinaryOpFPTestHelperVX<float, float, float>(
+  BinaryOpFPTestHelperVX<float, float, float, RVScalarRegister>(
       "Vfsgnjn_vx32", /*sew*/ 32, instruction_, /*delta_position*/ 32,
       [](float vs2, float vs1) -> float {
         using Int = typename FPTypeInfo<float>::IntType;
@@ -1201,7 +1202,7 @@
       });
   ResetInstruction();
   SetSemanticFunction(&Vfsgnjn);
-  BinaryOpFPTestHelperVX<double, double, double>(
+  BinaryOpFPTestHelperVX<double, double, double, RVScalarRegister>(
       "Vfsgnjn_vx64", /*sew*/ 64, instruction_, /*delta_position*/ 64,
       [](double vs2, double vs1) -> double {
         using Int = typename FPTypeInfo<double>::IntType;
@@ -1236,7 +1237,7 @@
   // Vector-scalar.
   ResetInstruction();
   SetSemanticFunction(&Vfsgnjx);
-  BinaryOpFPTestHelperVX<float, float, float>(
+  BinaryOpFPTestHelperVX<float, float, float, RVScalarRegister>(
       "Vfsgnjx_vx32", /*sew*/ 32, instruction_, /*delta_position*/ 32,
       [](float vs2, float vs1) -> float {
         using Int = typename FPTypeInfo<float>::IntType;
@@ -1246,7 +1247,7 @@
       });
   ResetInstruction();
   SetSemanticFunction(&Vfsgnjx);
-  BinaryOpFPTestHelperVX<double, double, double>(
+  BinaryOpFPTestHelperVX<double, double, double, RVScalarRegister>(
       "Vfsgnjx_vx64", /*sew*/ 64, instruction_, /*delta_position*/ 64,
       [](double vs2, double vs1) -> double {
         using Int = typename FPTypeInfo<double>::IntType;
@@ -1312,7 +1313,7 @@
   // Vector-scalar.
   ResetInstruction();
   SetSemanticFunction(&Vfmax);
-  BinaryOpWithFflagsFPTestHelperVX<float, float, float>(
+  BinaryOpWithFflagsFPTestHelperVX<float, float, float, RVScalarRegister>(
       "Vfmax_vx32", /*sew*/ 32, instruction_, /*delta_position*/ 32,
       [](float vs2, float vs1) -> std::tuple<float, uint32_t> {
         using T = float;
@@ -1322,7 +1323,7 @@
       });
   ResetInstruction();
   SetSemanticFunction(&Vfmax);
-  BinaryOpWithFflagsFPTestHelperVX<double, double, double>(
+  BinaryOpWithFflagsFPTestHelperVX<double, double, double, RVScalarRegister>(
       "Vfmax_vx64", /*sew*/ 64, instruction_, /*delta_position*/ 64,
       [](double vs2, double vs1) -> std::tuple<double, uint32_t> {
         using T = double;
@@ -1356,7 +1357,7 @@
   // Vector-scalar.
   ResetInstruction();
   SetSemanticFunction(&Vfmin);
-  BinaryOpWithFflagsFPTestHelperVX<float, float, float>(
+  BinaryOpWithFflagsFPTestHelperVX<float, float, float, RVScalarRegister>(
       "Vfmin_vx32", /*sew*/ 32, instruction_, /*delta_position*/ 32,
       [](float vs2, float vs1) -> std::tuple<float, uint32_t> {
         using T = float;
@@ -1366,7 +1367,7 @@
       });
   ResetInstruction();
   SetSemanticFunction(&Vfmin);
-  BinaryOpWithFflagsFPTestHelperVX<double, double, double>(
+  BinaryOpWithFflagsFPTestHelperVX<double, double, double, RVScalarRegister>(
       "Vfmin_vx64", /*sew*/ 64, instruction_, /*delta_position*/ 64,
       [](double vs2, double vs1) -> std::tuple<double, uint32_t> {
         using T = double;
@@ -1379,12 +1380,12 @@
 TEST_F(RiscVFPInstructionsTest, Vfmerge) {
   // Vector-scalar.
   SetSemanticFunction(&Vfmerge);
-  BinaryOpFPWithMaskTestHelperVX<float, float, float>(
+  BinaryOpFPWithMaskTestHelperVX<float, float, float, RVScalarRegister>(
       "Vfmerge_vx32", /*sew*/ 32, instruction_, /*delta position*/ 32,
       [](float vs2, float vs1, bool mask) -> float {
         return mask ? vs1 : vs2;
       });
-  BinaryOpFPWithMaskTestHelperVX<double, double, double>(
+  BinaryOpFPWithMaskTestHelperVX<double, double, double, RVScalarRegister>(
       "Vfmerge_vx64", /*sew*/ 64, instruction_, /*delta position*/ 64,
       [](double vs2, double vs1, bool mask) -> double {
         return mask ? vs1 : vs2;

diff --git a/riscv/test/riscv_vector_fp_test_utilities.h b/riscv/test/riscv_vector_fp_test_utilities.h
index 9ab9d3a..9ed5ff4 100644
--- a/riscv/test/riscv_vector_fp_test_utilities.h
+++ b/riscv/test/riscv_vector_fp_test_utilities.h

@@ -607,7 +607,7 @@
 
   // Floating point test needs to ensure to use the fp special values (inf,
   // NaN etc.) during testing, not just random values.
-  template <typename Vd, typename Vs2, typename Fs1>
+  template <typename Vd, typename Vs2, typename Fs1, typename ScalarReg>
   void BinaryOpWithFflagsFPTestHelperVX(
       absl::string_view name, int sew, Instruction *inst, int delta_position,
       std::function<std::tuple<Vd, uint32_t>(Vs2, Fs1)> operation) {
@@ -628,7 +628,7 @@
     Vs2 vs2_value[vs2_size * 8];
     auto vs2_span = Span<Vs2>(vs2_value);
     AppendVectorRegisterOperands({kVs2}, {kVd});
-    AppendRegisterOperands<Fs1>({kFs1Name}, {});
+    AppendRegisterOperands<ScalarReg>({kFs1Name}, {});
     auto *flag_op = rv_fp_->fflags()->CreateSetDestinationOperand(0, "fflags");
     instruction_->AppendDestination(flag_op);
     AppendVectorRegisterOperands({kVmask}, {});
@@ -776,7 +776,7 @@
   // Floating point test needs to ensure to use the fp special values (inf,
   // NaN etc.) during testing, not just random values. This function handles
   // vector scalar instructions.
-  template <typename Vd, typename Vs2, typename Fs1>
+  template <typename Vd, typename Vs2, typename Fs1, typename ScalarReg>
   void BinaryOpFPWithMaskTestHelperVX(
       absl::string_view name, int sew, Instruction *inst, int delta_position,
       std::function<Vd(Vs2, Fs1, bool)> operation) {
@@ -797,7 +797,7 @@
     Vs2 vs2_value[vs2_size * 8];
     auto vs2_span = Span<Vs2>(vs2_value);
     AppendVectorRegisterOperands({kVs2}, {kVd});
-    AppendRegisterOperands<Fs1>({kFs1Name}, {});
+    AppendRegisterOperands<ScalarReg>({kFs1Name}, {});
     AppendVectorRegisterOperands({kVmask}, {});
     SetVectorRegisterValues<uint8_t>(
         {{kVmaskName, Span<const uint8_t>(kA5Mask)}});
@@ -930,11 +930,11 @@
 
   // Templated helper function that tests FP vector-scalar instructions that do
   // not use the value of the mask bit.
-  template <typename Vd, typename Vs2, typename Vs1>
+  template <typename Vd, typename Vs2, typename Vs1, typename ScalarReg>
   void BinaryOpFPTestHelperVX(absl::string_view name, int sew,
                               Instruction *inst, int delta_position,
                               std::function<Vd(Vs2, Vs1)> operation) {
-    BinaryOpFPWithMaskTestHelperVX<Vd, Vs2, Vs1>(
+    BinaryOpFPWithMaskTestHelperVX<Vd, Vs2, Vs1, ScalarReg>(
         name, sew, inst, delta_position,
         [operation](Vs2 vs2, Vs1 vs1, bool mask_value) -> Vd {
           if (mask_value) {

diff --git a/riscv/test/riscv_vector_instructions_test_base.h b/riscv/test/riscv_vector_instructions_test_base.h
index 7ba43ce..bc0892a 100644
--- a/riscv/test/riscv_vector_instructions_test_base.h
+++ b/riscv/test/riscv_vector_instructions_test_base.h

@@ -185,11 +185,11 @@
                               const std::vector<std::string> &sources,
                               const std::vector<std::string> &destinations) {
     for (auto &reg_name : sources) {
-      auto *reg = state_->GetRegister<RV32Register>(reg_name).first;
+      auto *reg = state_->GetRegister<T>(reg_name).first;
       inst->AppendSource(reg->CreateSourceOperand());
     }
     for (auto &reg_name : destinations) {
-      auto *reg = state_->GetRegister<RV32Register>(reg_name).first;
+      auto *reg = state_->GetRegister<T>(reg_name).first;
       inst->AppendDestination(reg->CreateDestinationOperand(0));
     }
   }
@@ -548,7 +548,7 @@
 
   // Helper function for testing vector-scalar/immediate instructions that use
   // the value of the mask bit.
-  template <typename Vd, typename Vs2, typename Rs1>
+  template <typename Vd, typename Vs2, typename Rs1, typename ScalarReg>
   void BinaryOpWithMaskTestHelperVX(
       absl::string_view name, int sew, Instruction *inst,
       std::function<Vd(Vs2, Rs1, bool)> operation) {
@@ -566,7 +566,7 @@
     Vs2 vs2_value[vs2_size * 8];
     auto vs2_span = Span<Vs2>(vs2_value);
     AppendVectorRegisterOperands({kVs2}, {});
-    AppendRegisterOperands<Rs1>({kRs1Name}, {});
+    AppendRegisterOperands<ScalarReg>({kRs1Name}, {});
     AppendVectorRegisterOperands({kVmask}, {kVd});
     // Initialize input values.
     FillArrayWithRandomValues<Vs2>(vs2_span);
@@ -663,10 +663,10 @@
 
   // Templated helper function that tests vector-scalar instructions that do
   // not use the value of the mask bit.
-  template <typename Vd, typename Vs2, typename Vs1>
+  template <typename Vd, typename Vs2, typename Vs1, typename ScalarReg>
   void BinaryOpTestHelperVX(absl::string_view name, int sew, Instruction *inst,
                             std::function<Vd(Vs2, Vs1)> operation) {
-    BinaryOpWithMaskTestHelperVX<Vd, Vs2, Vs1>(
+    BinaryOpWithMaskTestHelperVX<Vd, Vs2, Vs1, ScalarReg>(
         name, sew, inst, [operation](Vs2 vs2, Vs1 vs1, bool mask_value) -> Vd {
           if (mask_value) {
             return operation(vs2, vs1);
@@ -814,7 +814,7 @@
 
   // Helper function for testing vector-scalar/immediate instructions that use
   // the value of the mask bit.
-  template <typename Vd, typename Vs2, typename Rs1>
+  template <typename Vd, typename Vs2, typename Rs1, typename ScalarReg>
   void TernaryOpWithMaskTestHelperVX(
       absl::string_view name, int sew, Instruction *inst,
       std::function<Vd(Vs2, Rs1, Vd, bool)> operation) {
@@ -835,7 +835,7 @@
     Vs2 vs2_value[vs2_size * 8];
     auto vs2_span = Span<Vs2>(vs2_value);
     AppendVectorRegisterOperands({kVs2}, {});
-    AppendRegisterOperands<Rs1>({kRs1Name}, {});
+    AppendRegisterOperands<ScalarReg>({kRs1Name}, {});
     AppendVectorRegisterOperands({kVd, kVmask}, {kVd});
     // Initialize input values.
     FillArrayWithRandomValues<Vd>(vd_span);
@@ -945,10 +945,10 @@
 
   // Templated helper function that tests vector-scalar instructions that do
   // not use the value of the mask bit.
-  template <typename Vd, typename Vs2, typename Rs1>
+  template <typename Vd, typename Vs2, typename Rs1, typename ScalarReg>
   void TernaryOpTestHelperVX(absl::string_view name, int sew, Instruction *inst,
                              std::function<Vd(Vs2, Rs1, Vd)> operation) {
-    TernaryOpWithMaskTestHelperVX<Vd, Vs2, Rs1>(
+    TernaryOpWithMaskTestHelperVX<Vd, Vs2, Rs1, ScalarReg>(
         name, sew, inst,
         [operation](Vs2 vs2, Rs1 rs1, Vd vd, bool mask_value) -> Vd {
           if (mask_value) {
@@ -1075,7 +1075,7 @@
 
   // Helper function for testing mask vector-scalar/immediate instructions that
   // use the mask bit.
-  template <typename Vs2, typename Rs1>
+  template <typename Vs2, typename Rs1, typename ScalarReg>
   void BinaryMaskOpWithMaskTestHelperVX(
       absl::string_view name, int sew, Instruction *inst,
       std::function<uint8_t(Vs2, Rs1, bool)> operation) {
@@ -1092,7 +1092,7 @@
     Vs2 vs2_value[vs2_size * 8];
     auto vs2_span = Span<Vs2>(vs2_value);
     AppendVectorRegisterOperands({kVs2}, {});
-    AppendRegisterOperands<Rs1>({kRs1Name}, {});
+    AppendRegisterOperands<ScalarReg>({kRs1Name}, {});
     AppendVectorRegisterOperands({kVmask}, {kVd});
     // Initialize input values.
     FillArrayWithRandomValues<Vs2>(vs2_span);
@@ -1172,11 +1172,11 @@
 
   // Helper function for testing mask vector-vector instructions that do not
   // use the mask bit.
-  template <typename Vs2, typename Vs1>
+  template <typename Vs2, typename Vs1, typename ScalarReg>
   void BinaryMaskOpTestHelperVX(absl::string_view name, int sew,
                                 Instruction *inst,
                                 std::function<uint8_t(Vs2, Vs1)> operation) {
-    BinaryMaskOpWithMaskTestHelperVX<Vs2, Vs1>(
+    BinaryMaskOpWithMaskTestHelperVX<Vs2, Vs1, ScalarReg>(
         name, sew, inst,
         [operation](Vs2 vs2, Vs1 vs1, bool mask_value) -> uint8_t {
           if (mask_value) {

diff --git a/riscv/test/riscv_vector_opi_instructions_test.cc b/riscv/test/riscv_vector_opi_instructions_test.cc
index 170b760..28cefbe 100644
--- a/riscv/test/riscv_vector_opi_instructions_test.cc
+++ b/riscv/test/riscv_vector_opi_instructions_test.cc

@@ -86,6 +86,8 @@
 using ::mpact::sim::riscv::test::kVectorLengthInBytes;
 using ::mpact::sim::riscv::test::kVs2;
 
+using RVScalarRegister = RV32Register;
+
 class RiscVVectorInstructionsTest : public RiscVVectorInstructionsTestBase {};
 
 // Each instruction is tested for each element width, and for vector-vector
@@ -125,7 +127,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vadd8VX) {
   SetSemanticFunction(&Vadd);
 
-  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t>(
+  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t, RVScalarRegister>(
       "Vadd8", /*sew*/ 8, instruction_,
       [](uint8_t val0, uint8_t val1) -> uint8_t {
         return val0 + static_cast<uint8_t>(val1);
@@ -134,21 +136,21 @@
 
 TEST_F(RiscVVectorInstructionsTest, Vadd16VX) {
   SetSemanticFunction(&Vadd);
-  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t>(
+  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t, RVScalarRegister>(
       "Vadd16", /*sew*/ 16, instruction_,
       [](uint16_t val0, uint16_t val1) -> uint16_t { return val0 + val1; });
 }
 
 TEST_F(RiscVVectorInstructionsTest, Vadd32VX) {
   SetSemanticFunction(&Vadd);
-  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t>(
+  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t, RVScalarRegister>(
       "Vadd32", /*sew*/ 32, instruction_,
       [](uint32_t val0, uint32_t val1) -> uint32_t { return val0 + val1; });
 }
 
 TEST_F(RiscVVectorInstructionsTest, Vadd64VX) {
   SetSemanticFunction(&Vadd);
-  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t>(
+  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t, RVScalarRegister>(
       "Vadd64", /*sew*/ 64, instruction_,
       [](uint64_t val0, uint64_t val1) -> uint64_t { return val0 + val1; });
 }
@@ -186,28 +188,28 @@
 // Vector-scalar.
 TEST_F(RiscVVectorInstructionsTest, Vsub8VX) {
   SetSemanticFunction(&Vsub);
-  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t>(
+  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t, RVScalarRegister>(
       "Vsub8", /*sew*/ 8, instruction_,
       [](uint8_t val0, uint8_t val1) -> uint8_t { return val0 - val1; });
 }
 
 TEST_F(RiscVVectorInstructionsTest, Vsub16VX) {
   SetSemanticFunction(&Vsub);
-  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t>(
+  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t, RVScalarRegister>(
       "Vsub16", /*sew*/ 16, instruction_,
       [](uint16_t val0, uint16_t val1) -> uint16_t { return val0 - val1; });
 }
 
 TEST_F(RiscVVectorInstructionsTest, Vsub32VX) {
   SetSemanticFunction(&Vsub);
-  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t>(
+  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t, RVScalarRegister>(
       "Vsub32", /*sew*/ 32, instruction_,
       [](uint32_t val0, uint32_t val1) -> uint32_t { return val0 - val1; });
 }
 
 TEST_F(RiscVVectorInstructionsTest, Vsub64VX) {
   SetSemanticFunction(&Vsub);
-  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t>(
+  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t, RVScalarRegister>(
       "Vsub64", /*sew*/ 64, instruction_,
       [](uint64_t val0, uint64_t val1) -> uint64_t { return val0 - val1; });
 }
@@ -216,28 +218,28 @@
 // Vector-Scalar only.
 TEST_F(RiscVVectorInstructionsTest, Vrsub8VX) {
   SetSemanticFunction(&Vrsub);
-  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t>(
+  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t, RVScalarRegister>(
       "Vrsub8", /*sew*/ 8, instruction_,
       [](uint8_t val0, uint8_t val1) -> uint8_t { return val1 - val0; });
 }
 
 TEST_F(RiscVVectorInstructionsTest, Vrsub16VX) {
   SetSemanticFunction(&Vrsub);
-  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t>(
+  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t, RVScalarRegister>(
       "Vrsub16", /*sew*/ 16, instruction_,
       [](uint16_t val0, uint16_t val1) -> uint16_t { return val1 - val0; });
 }
 
 TEST_F(RiscVVectorInstructionsTest, Vrsub32VX) {
   SetSemanticFunction(&Vrsub);
-  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t>(
+  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t, RVScalarRegister>(
       "Vrsub32", /*sew*/ 32, instruction_,
       [](uint32_t val0, uint32_t val1) -> uint32_t { return val1 - val0; });
 }
 
 TEST_F(RiscVVectorInstructionsTest, Vrsub64VX) {
   SetSemanticFunction(&Vrsub);
-  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t>(
+  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t, RVScalarRegister>(
       "Vrsub64", /*sew*/ 64, instruction_,
       [](uint64_t val0, uint64_t val1) -> uint64_t { return val1 - val0; });
 }
@@ -280,7 +282,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vand8VX) {
   SetSemanticFunction(&Vand);
 
-  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t>(
+  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t, RVScalarRegister>(
       "Vand8", /*sew*/ 8, instruction_,
       [](uint8_t val0, uint8_t val1) -> uint8_t { return val0 & val1; });
 }
@@ -288,7 +290,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vand16VX) {
   SetSemanticFunction(&Vand);
 
-  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t>(
+  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t, RVScalarRegister>(
       "Vand16", /*sew*/ 16, instruction_,
       [](uint16_t val0, uint16_t val1) -> uint16_t { return val0 & val1; });
 }
@@ -296,7 +298,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vand32VX) {
   SetSemanticFunction(&Vand);
 
-  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t>(
+  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t, RVScalarRegister>(
       "Vand32", /*sew*/ 32, instruction_,
       [](uint32_t val0, uint32_t val1) -> uint32_t { return val0 & val1; });
 }
@@ -304,7 +306,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vand64VX) {
   SetSemanticFunction(&Vand);
 
-  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t>(
+  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t, RVScalarRegister>(
       "Vand64", /*sew*/ 64, instruction_,
       [](uint64_t val0, uint64_t val1) -> uint64_t { return val0 & val1; });
 }
@@ -347,7 +349,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vor8VX) {
   SetSemanticFunction(&Vor);
 
-  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t>(
+  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t, RVScalarRegister>(
       "Vor8", /*sew*/ 8, instruction_,
       [](uint8_t val0, uint8_t val1) -> uint8_t { return val0 | val1; });
 }
@@ -355,7 +357,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vor16VX) {
   SetSemanticFunction(&Vor);
 
-  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t>(
+  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t, RVScalarRegister>(
       "Vor16", /*sew*/ 16, instruction_,
       [](uint16_t val0, uint16_t val1) -> uint16_t { return val0 | val1; });
 }
@@ -363,7 +365,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vor32VX) {
   SetSemanticFunction(&Vor);
 
-  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t>(
+  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t, RVScalarRegister>(
       "Vor32", /*sew*/ 32, instruction_,
       [](uint32_t val0, uint32_t val1) -> uint32_t { return val0 | val1; });
 }
@@ -371,7 +373,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vor64VX) {
   SetSemanticFunction(&Vor);
 
-  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t>(
+  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t, RVScalarRegister>(
       "Vor64", /*sew*/ 64, instruction_,
       [](uint64_t val0, uint64_t val1) -> uint64_t { return val0 | val1; });
 }
@@ -413,7 +415,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vxor8VX) {
   SetSemanticFunction(&Vxor);
 
-  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t>(
+  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t, RVScalarRegister>(
       "Vxor8", /*sew*/ 8, instruction_,
       [](uint8_t val0, uint8_t val1) -> uint8_t { return val0 ^ val1; });
 }
@@ -421,7 +423,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vxor16VX) {
   SetSemanticFunction(&Vxor);
 
-  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t>(
+  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t, RVScalarRegister>(
       "Vxor16", /*sew*/ 16, instruction_,
       [](uint16_t val0, uint16_t val1) -> uint16_t { return val0 ^ val1; });
 }
@@ -429,7 +431,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vxor32VX) {
   SetSemanticFunction(&Vxor);
 
-  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t>(
+  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t, RVScalarRegister>(
       "Vxor32", /*sew*/ 32, instruction_,
       [](uint32_t val0, uint32_t val1) -> uint32_t { return val0 ^ val1; });
 }
@@ -437,7 +439,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vxor64VX) {
   SetSemanticFunction(&Vxor);
 
-  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t>(
+  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t, RVScalarRegister>(
       "Vxor64", /*sew*/ 64, instruction_,
       [](uint64_t val0, uint64_t val1) -> uint64_t { return val0 ^ val1; });
 }
@@ -488,7 +490,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vsll8VX) {
   SetSemanticFunction(&Vsll);
 
-  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t>(
+  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t, RVScalarRegister>(
       "Vsll8", /*sew*/ 8, instruction_,
       [](uint8_t val0, uint8_t val1) -> uint8_t {
         return val0 << (val1 & 0b111);
@@ -498,7 +500,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vsll16VX) {
   SetSemanticFunction(&Vsll);
 
-  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t>(
+  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t, RVScalarRegister>(
       "Vsll16", /*sew*/ 16, instruction_,
       [](uint16_t val0, uint16_t val1) -> uint16_t {
         return val0 << (val1 & 0b1111);
@@ -508,7 +510,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vsll32VX) {
   SetSemanticFunction(&Vsll);
 
-  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t>(
+  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t, RVScalarRegister>(
       "Vsll32", /*sew*/ 32, instruction_,
       [](uint32_t val0, uint32_t val1) -> uint32_t {
         return val0 << (val1 & 0b1'1111);
@@ -518,7 +520,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vsll64VX) {
   SetSemanticFunction(&Vsll);
 
-  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t>(
+  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t, RVScalarRegister>(
       "Vsll64", /*sew*/ 64, instruction_,
       [](uint64_t val0, uint64_t val1) -> uint64_t {
         return val0 << (val1 & 0b11'1111);
@@ -571,7 +573,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vsrl8VX) {
   SetSemanticFunction(&Vsrl);
 
-  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t>(
+  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t, RVScalarRegister>(
       "Vsrl8", /*sew*/ 8, instruction_,
       [](uint8_t val0, uint8_t val1) -> uint8_t {
         return val0 >> (val1 & 0b111);
@@ -581,7 +583,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vsrl16VX) {
   SetSemanticFunction(&Vsrl);
 
-  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t>(
+  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t, RVScalarRegister>(
       "Vsrl16", /*sew*/ 16, instruction_,
       [](uint16_t val0, uint16_t val1) -> uint16_t {
         return val0 >> (val1 & 0b1111);
@@ -591,7 +593,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vsrl32VX) {
   SetSemanticFunction(&Vsrl);
 
-  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t>(
+  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t, RVScalarRegister>(
       "Vsrl32", /*sew*/ 32, instruction_,
       [](uint32_t val0, uint32_t val1) -> uint32_t {
         return val0 >> (val1 & 0b1'1111);
@@ -601,7 +603,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vsrl64VX) {
   SetSemanticFunction(&Vsrl);
 
-  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t>(
+  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t, RVScalarRegister>(
       "Vsrl64", /*sew*/ 64, instruction_,
       [](uint64_t val0, uint64_t val1) -> uint64_t {
         return val0 >> (val1 & 0b11'1111);
@@ -654,7 +656,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vsra8VX) {
   SetSemanticFunction(&Vsra);
 
-  BinaryOpTestHelperVX<uint8_t, int8_t, uint8_t>(
+  BinaryOpTestHelperVX<uint8_t, int8_t, uint8_t, RVScalarRegister>(
       "Vsra8", /*sew*/ 8, instruction_,
       [](int8_t val0, uint8_t val1) -> int8_t {
         return val0 >> (val1 & 0b111);
@@ -664,7 +666,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vsra16VX) {
   SetSemanticFunction(&Vsra);
 
-  BinaryOpTestHelperVX<uint16_t, int16_t, uint16_t>(
+  BinaryOpTestHelperVX<uint16_t, int16_t, uint16_t, RVScalarRegister>(
       "Vsra16", /*sew*/ 16, instruction_,
       [](int16_t val0, uint16_t val1) -> int16_t {
         return val0 >> (val1 & 0b1111);
@@ -674,7 +676,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vsra32VX) {
   SetSemanticFunction(&Vsra);
 
-  BinaryOpTestHelperVX<uint32_t, int32_t, uint32_t>(
+  BinaryOpTestHelperVX<uint32_t, int32_t, uint32_t, RVScalarRegister>(
       "Vsra32", /*sew*/ 32, instruction_,
       [](int32_t val0, uint32_t val1) -> int32_t {
         return val0 >> (val1 & 0b1'1111);
@@ -684,7 +686,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vsra64VX) {
   SetSemanticFunction(&Vsra);
 
-  BinaryOpTestHelperVX<uint64_t, int64_t, uint64_t>(
+  BinaryOpTestHelperVX<uint64_t, int64_t, uint64_t, RVScalarRegister>(
       "Vsll64", /*sew*/ 64, instruction_,
       [](int64_t val0, uint64_t val1) -> int64_t {
         return val0 >> (val1 & 0b11'1111);
@@ -727,7 +729,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vnsrl8VX) {
   SetSemanticFunction(&Vnsrl);
 
-  BinaryOpTestHelperVX<uint8_t, uint16_t, uint8_t>(
+  BinaryOpTestHelperVX<uint8_t, uint16_t, uint8_t, RVScalarRegister>(
       "Vsra8", /*sew*/ 8, instruction_,
       [](uint16_t val0, uint8_t val1) -> uint8_t {
         return static_cast<uint8_t>(val0 >> (val1 & 0b1111));
@@ -737,7 +739,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vnsrl16VX) {
   SetSemanticFunction(&Vnsrl);
 
-  BinaryOpTestHelperVX<uint16_t, uint32_t, uint16_t>(
+  BinaryOpTestHelperVX<uint16_t, uint32_t, uint16_t, RVScalarRegister>(
       "Vsll16", /*sew*/ 16, instruction_,
       [](uint32_t val0, uint16_t val1) -> uint16_t {
         return static_cast<uint16_t>(val0 >> (val1 & 0b1'1111));
@@ -747,7 +749,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vnsrl32VX) {
   SetSemanticFunction(&Vnsrl);
 
-  BinaryOpTestHelperVX<uint32_t, uint64_t, uint32_t>(
+  BinaryOpTestHelperVX<uint32_t, uint64_t, uint32_t, RVScalarRegister>(
       "Vsll32", /*sew*/ 32, instruction_,
       [](uint64_t val0, uint32_t val1) -> uint32_t {
         return static_cast<uint32_t>(val0 >> (val1 & 0b11'1111));
@@ -790,7 +792,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vnsra8VX) {
   SetSemanticFunction(&Vnsra);
 
-  BinaryOpTestHelperVX<uint8_t, uint16_t, uint8_t>(
+  BinaryOpTestHelperVX<uint8_t, uint16_t, uint8_t, RVScalarRegister>(
       "Vsra8", /*sew*/ 8, instruction_,
       [](int16_t val0, uint8_t val1) -> uint8_t {
         return static_cast<uint8_t>(val0 >> (val1 & 0b1111));
@@ -800,7 +802,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vnsra16VX) {
   SetSemanticFunction(&Vnsra);
 
-  BinaryOpTestHelperVX<uint16_t, uint32_t, uint16_t>(
+  BinaryOpTestHelperVX<uint16_t, uint32_t, uint16_t, RVScalarRegister>(
       "Vsll16", /*sew*/ 16, instruction_,
       [](int32_t val0, uint16_t val1) -> uint16_t {
         return static_cast<uint16_t>(val0 >> (val1 & 0b1'1111));
@@ -810,7 +812,7 @@
 TEST_F(RiscVVectorInstructionsTest, Vnsra32VX) {
   SetSemanticFunction(&Vnsra);
 
-  BinaryOpTestHelperVX<uint32_t, uint64_t, uint32_t>(
+  BinaryOpTestHelperVX<uint32_t, uint64_t, uint32_t, RVScalarRegister>(
       "Vsll32", /*sew*/ 32, instruction_,
       [](int64_t val0, uint32_t val1) -> uint32_t {
         return static_cast<uint32_t>(val0 >> (val1 & 0b11'1111));
@@ -854,7 +856,7 @@
 // Vector-Scalar
 TEST_F(RiscVVectorInstructionsTest, Vminu8VX) {
   SetSemanticFunction(&Vminu);
-  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t>(
+  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t, RVScalarRegister>(
       "Vminu8", /*sew*/ 8, instruction_,
       [](uint8_t val0, uint8_t val1) -> uint8_t {
         return (val0 < val1) ? val0 : val1;
@@ -862,7 +864,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vminu16VX) {
   SetSemanticFunction(&Vminu);
-  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t>(
+  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t, RVScalarRegister>(
       "Vminu16", /*sew*/ 16, instruction_,
       [](uint16_t val0, uint16_t val1) -> uint16_t {
         return (val0 < val1) ? val0 : val1;
@@ -870,7 +872,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vminu32VX) {
   SetSemanticFunction(&Vminu);
-  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t>(
+  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t, RVScalarRegister>(
       "Vminu32", /*sew*/ 32, instruction_,
       [](uint32_t val0, uint32_t val1) -> uint32_t {
         return (val0 < val1) ? val0 : val1;
@@ -878,7 +880,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vminu64VX) {
   SetSemanticFunction(&Vminu);
-  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t>(
+  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t, RVScalarRegister>(
       "Vminu64", /*sew*/ 64, instruction_,
       [](uint64_t val0, uint64_t val1) -> uint64_t {
         return (val0 < val1) ? val0 : val1;
@@ -921,14 +923,14 @@
 // Vector-Scalar
 TEST_F(RiscVVectorInstructionsTest, Vmin8VX) {
   SetSemanticFunction(&Vmin);
-  BinaryOpTestHelperVX<int8_t, int8_t, int8_t>(
+  BinaryOpTestHelperVX<int8_t, int8_t, int8_t, RVScalarRegister>(
       "Vmin8", /*sew*/ 8, instruction_, [](int8_t val0, int8_t val1) -> int8_t {
         return (val0 < val1) ? val0 : val1;
       });
 }
 TEST_F(RiscVVectorInstructionsTest, Vmin16VX) {
   SetSemanticFunction(&Vmin);
-  BinaryOpTestHelperVX<int16_t, int16_t, int16_t>(
+  BinaryOpTestHelperVX<int16_t, int16_t, int16_t, RVScalarRegister>(
       "Vmin16", /*sew*/ 16, instruction_,
       [](int16_t val0, int16_t val1) -> int16_t {
         return (val0 < val1) ? val0 : val1;
@@ -936,7 +938,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmin32VX) {
   SetSemanticFunction(&Vmin);
-  BinaryOpTestHelperVX<int32_t, int32_t, int32_t>(
+  BinaryOpTestHelperVX<int32_t, int32_t, int32_t, RVScalarRegister>(
       "Vmin32", /*sew*/ 32, instruction_,
       [](int32_t val0, int32_t val1) -> int32_t {
         return (val0 < val1) ? val0 : val1;
@@ -944,7 +946,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmin64VX) {
   SetSemanticFunction(&Vmin);
-  BinaryOpTestHelperVX<int64_t, int64_t, int64_t>(
+  BinaryOpTestHelperVX<int64_t, int64_t, int64_t, RVScalarRegister>(
       "Vmin64", /*sew*/ 64, instruction_,
       [](int64_t val0, int64_t val1) -> int64_t {
         return (val0 < val1) ? val0 : val1;
@@ -988,7 +990,7 @@
 // Vector-Scalar.
 TEST_F(RiscVVectorInstructionsTest, Vmaxu8VX) {
   SetSemanticFunction(&Vmaxu);
-  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t>(
+  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t, RVScalarRegister>(
       "Vmaxu8", /*sew*/ 8, instruction_,
       [](uint8_t val0, uint8_t val1) -> uint8_t {
         return (val0 > val1) ? val0 : val1;
@@ -996,7 +998,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmaxu16VX) {
   SetSemanticFunction(&Vmaxu);
-  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t>(
+  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t, RVScalarRegister>(
       "Vmaxu16", /*sew*/ 16, instruction_,
       [](uint16_t val0, uint16_t val1) -> uint16_t {
         return (val0 > val1) ? val0 : val1;
@@ -1004,7 +1006,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmaxu32VX) {
   SetSemanticFunction(&Vmaxu);
-  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t>(
+  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t, RVScalarRegister>(
       "Vmaxu32", /*sew*/ 32, instruction_,
       [](uint32_t val0, uint32_t val1) -> uint32_t {
         return (val0 > val1) ? val0 : val1;
@@ -1012,7 +1014,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmaxu64VX) {
   SetSemanticFunction(&Vmaxu);
-  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t>(
+  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t, RVScalarRegister>(
       "Vmaxu64", /*sew*/ 64, instruction_,
       [](uint64_t val0, uint64_t val1) -> uint64_t {
         return (val0 > val1) ? val0 : val1;
@@ -1054,14 +1056,14 @@
 // Vector-Scalar
 TEST_F(RiscVVectorInstructionsTest, Vmax8VX) {
   SetSemanticFunction(&Vmax);
-  BinaryOpTestHelperVX<int8_t, int8_t, int8_t>(
+  BinaryOpTestHelperVX<int8_t, int8_t, int8_t, RVScalarRegister>(
       "Vmin8", /*sew*/ 8, instruction_, [](int8_t val0, int8_t val1) -> int8_t {
         return (val0 > val1) ? val0 : val1;
       });
 }
 TEST_F(RiscVVectorInstructionsTest, Vmax16VX) {
   SetSemanticFunction(&Vmax);
-  BinaryOpTestHelperVX<int16_t, int16_t, int16_t>(
+  BinaryOpTestHelperVX<int16_t, int16_t, int16_t, RVScalarRegister>(
       "Vmin16", /*sew*/ 16, instruction_,
       [](int16_t val0, int16_t val1) -> int16_t {
         return (val0 > val1) ? val0 : val1;
@@ -1069,7 +1071,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmax32VX) {
   SetSemanticFunction(&Vmax);
-  BinaryOpTestHelperVX<int32_t, int32_t, int32_t>(
+  BinaryOpTestHelperVX<int32_t, int32_t, int32_t, RVScalarRegister>(
       "Vmin32", /*sew*/ 32, instruction_,
       [](int32_t val0, int32_t val1) -> int32_t {
         return (val0 > val1) ? val0 : val1;
@@ -1077,7 +1079,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmax64VX) {
   SetSemanticFunction(&Vmax);
-  BinaryOpTestHelperVX<int64_t, int64_t, int64_t>(
+  BinaryOpTestHelperVX<int64_t, int64_t, int64_t, RVScalarRegister>(
       "Vmin64", /*sew*/ 64, instruction_,
       [](int64_t val0, int64_t val1) -> int64_t {
         return (val0 > val1) ? val0 : val1;
@@ -1123,7 +1125,7 @@
 // Vector-Scalar.
 TEST_F(RiscVVectorInstructionsTest, Vmseq8VX) {
   SetSemanticFunction(&Vmseq);
-  BinaryMaskOpTestHelperVX<uint8_t, uint8_t>(
+  BinaryMaskOpTestHelperVX<uint8_t, uint8_t, RVScalarRegister>(
       "Vmseq8", /*sew*/ 8, instruction_,
       [](uint8_t val0, uint8_t val1) -> uint8_t {
         return (val0 == val1) ? 1 : 0;
@@ -1131,7 +1133,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmseq16VX) {
   SetSemanticFunction(&Vmseq);
-  BinaryMaskOpTestHelperVX<uint16_t, uint16_t>(
+  BinaryMaskOpTestHelperVX<uint16_t, uint16_t, RVScalarRegister>(
       "Vmseq16", /*sew*/ 16, instruction_,
       [](uint16_t val0, uint16_t val1) -> uint8_t {
         return (val0 == val1) ? 1 : 0;
@@ -1139,7 +1141,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmseq32VX) {
   SetSemanticFunction(&Vmseq);
-  BinaryMaskOpTestHelperVX<uint32_t, uint32_t>(
+  BinaryMaskOpTestHelperVX<uint32_t, uint32_t, RVScalarRegister>(
       "Vmseq32", /*sew*/ 32, instruction_,
       [](uint32_t val0, uint32_t val1) -> uint8_t {
         return (val0 == val1) ? 1 : 0;
@@ -1147,7 +1149,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmseq64VX) {
   SetSemanticFunction(&Vmseq);
-  BinaryMaskOpTestHelperVX<uint64_t, uint64_t>(
+  BinaryMaskOpTestHelperVX<uint64_t, uint64_t, RVScalarRegister>(
       "Vmseq64", /*sew*/ 64, instruction_,
       [](uint64_t val0, uint64_t val1) -> uint8_t {
         return (val0 == val1) ? 1 : 0;
@@ -1191,7 +1193,7 @@
 // Vector-Scalar.
 TEST_F(RiscVVectorInstructionsTest, Vmsne8VX) {
   SetSemanticFunction(&Vmsne);
-  BinaryMaskOpTestHelperVX<uint8_t, uint8_t>(
+  BinaryMaskOpTestHelperVX<uint8_t, uint8_t, RVScalarRegister>(
       "Vmsne8", /*sew*/ 8, instruction_,
       [](uint8_t val0, uint8_t val1) -> uint8_t {
         return (val0 != val1) ? 1 : 0;
@@ -1199,7 +1201,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsne16VX) {
   SetSemanticFunction(&Vmsne);
-  BinaryMaskOpTestHelperVX<uint16_t, uint16_t>(
+  BinaryMaskOpTestHelperVX<uint16_t, uint16_t, RVScalarRegister>(
       "Vmsne16", /*sew*/ 16, instruction_,
       [](uint16_t val0, uint16_t val1) -> uint8_t {
         return (val0 != val1) ? 1 : 0;
@@ -1207,7 +1209,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsne32VX) {
   SetSemanticFunction(&Vmsne);
-  BinaryMaskOpTestHelperVX<uint32_t, uint32_t>(
+  BinaryMaskOpTestHelperVX<uint32_t, uint32_t, RVScalarRegister>(
       "Vmsne32", /*sew*/ 32, instruction_,
       [](uint32_t val0, uint32_t val1) -> uint8_t {
         return (val0 != val1) ? 1 : 0;
@@ -1215,7 +1217,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsne64VX) {
   SetSemanticFunction(&Vmsne);
-  BinaryMaskOpTestHelperVX<uint64_t, uint64_t>(
+  BinaryMaskOpTestHelperVX<uint64_t, uint64_t, RVScalarRegister>(
       "Vmsne64", /*sew*/ 64, instruction_,
       [](uint64_t val0, uint64_t val1) -> uint8_t {
         return (val0 != val1) ? 1 : 0;
@@ -1259,7 +1261,7 @@
 // Vector-Scalar.
 TEST_F(RiscVVectorInstructionsTest, Vmsltu8VX) {
   SetSemanticFunction(&Vmsltu);
-  BinaryMaskOpTestHelperVX<uint8_t, uint8_t>(
+  BinaryMaskOpTestHelperVX<uint8_t, uint8_t, RVScalarRegister>(
       "Vmsltu8", /*sew*/ 8, instruction_,
       [](uint8_t val0, uint8_t val1) -> uint8_t {
         return (val0 < val1) ? 1 : 0;
@@ -1267,7 +1269,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsltu16VX) {
   SetSemanticFunction(&Vmsltu);
-  BinaryMaskOpTestHelperVX<uint16_t, uint16_t>(
+  BinaryMaskOpTestHelperVX<uint16_t, uint16_t, RVScalarRegister>(
       "Vmsltu16", /*sew*/ 16, instruction_,
       [](uint16_t val0, uint16_t val1) -> uint8_t {
         return (val0 < val1) ? 1 : 0;
@@ -1275,7 +1277,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsltu32VX) {
   SetSemanticFunction(&Vmsltu);
-  BinaryMaskOpTestHelperVX<uint32_t, uint32_t>(
+  BinaryMaskOpTestHelperVX<uint32_t, uint32_t, RVScalarRegister>(
       "Vmsltu32", /*sew*/ 32, instruction_,
       [](uint32_t val0, uint32_t val1) -> uint8_t {
         return (val0 < val1) ? 1 : 0;
@@ -1283,7 +1285,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsltu64VX) {
   SetSemanticFunction(&Vmsltu);
-  BinaryMaskOpTestHelperVX<uint64_t, uint64_t>(
+  BinaryMaskOpTestHelperVX<uint64_t, uint64_t, RVScalarRegister>(
       "Vmsltu64", /*sew*/ 64, instruction_,
       [](uint64_t val0, uint64_t val1) -> uint8_t {
         return (val0 < val1) ? 1 : 0;
@@ -1327,7 +1329,7 @@
 // Vector-Scalar.
 TEST_F(RiscVVectorInstructionsTest, Vmslt8VX) {
   SetSemanticFunction(&Vmslt);
-  BinaryMaskOpTestHelperVX<int8_t, int8_t>(
+  BinaryMaskOpTestHelperVX<int8_t, int8_t, RVScalarRegister>(
       "Vmslt8", /*sew*/ 8, instruction_,
       [](int8_t val0, int8_t val1) -> uint8_t {
         return (val0 < val1) ? 1 : 0;
@@ -1335,7 +1337,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmslt16VX) {
   SetSemanticFunction(&Vmslt);
-  BinaryMaskOpTestHelperVX<int16_t, int16_t>(
+  BinaryMaskOpTestHelperVX<int16_t, int16_t, RVScalarRegister>(
       "Vmslt16", /*sew*/ 16, instruction_,
       [](int16_t val0, int16_t val1) -> uint8_t {
         return (val0 < val1) ? 1 : 0;
@@ -1343,7 +1345,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmslt32VX) {
   SetSemanticFunction(&Vmslt);
-  BinaryMaskOpTestHelperVX<int32_t, int32_t>(
+  BinaryMaskOpTestHelperVX<int32_t, int32_t, RVScalarRegister>(
       "Vmslt32", /*sew*/ 32, instruction_,
       [](int32_t val0, int32_t val1) -> uint8_t {
         return (val0 < val1) ? 1 : 0;
@@ -1351,7 +1353,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmslt64VX) {
   SetSemanticFunction(&Vmslt);
-  BinaryMaskOpTestHelperVX<int64_t, int64_t>(
+  BinaryMaskOpTestHelperVX<int64_t, int64_t, RVScalarRegister>(
       "Vmslt64", /*sew*/ 64, instruction_,
       [](int64_t val0, int64_t val1) -> uint8_t {
         return (val0 < val1) ? 1 : 0;
@@ -1395,7 +1397,7 @@
 // Vector-Scalar.
 TEST_F(RiscVVectorInstructionsTest, Vmsleu8VX) {
   SetSemanticFunction(&Vmsleu);
-  BinaryMaskOpTestHelperVX<uint8_t, uint8_t>(
+  BinaryMaskOpTestHelperVX<uint8_t, uint8_t, RVScalarRegister>(
       "Vmsleu8", /*sew*/ 8, instruction_,
       [](uint8_t val0, uint8_t val1) -> uint8_t {
         return (val0 <= val1) ? 1 : 0;
@@ -1403,7 +1405,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsleu16VX) {
   SetSemanticFunction(&Vmsleu);
-  BinaryMaskOpTestHelperVX<uint16_t, uint16_t>(
+  BinaryMaskOpTestHelperVX<uint16_t, uint16_t, RVScalarRegister>(
       "Vmsleu16", /*sew*/ 16, instruction_,
       [](uint16_t val0, uint16_t val1) -> uint8_t {
         return (val0 <= val1) ? 1 : 0;
@@ -1411,7 +1413,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsleu32VX) {
   SetSemanticFunction(&Vmsleu);
-  BinaryMaskOpTestHelperVX<uint32_t, uint32_t>(
+  BinaryMaskOpTestHelperVX<uint32_t, uint32_t, RVScalarRegister>(
       "Vmsleu32", /*sew*/ 32, instruction_,
       [](uint32_t val0, uint32_t val1) -> uint8_t {
         return (val0 <= val1) ? 1 : 0;
@@ -1419,7 +1421,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsleu64VX) {
   SetSemanticFunction(&Vmsleu);
-  BinaryMaskOpTestHelperVX<uint64_t, uint64_t>(
+  BinaryMaskOpTestHelperVX<uint64_t, uint64_t, RVScalarRegister>(
       "Vmsleu64", /*sew*/ 64, instruction_,
       [](uint64_t val0, uint64_t val1) -> uint8_t {
         return (val0 <= val1) ? 1 : 0;
@@ -1463,7 +1465,7 @@
 // Vector-Scalar.
 TEST_F(RiscVVectorInstructionsTest, Vmsle8VX) {
   SetSemanticFunction(&Vmsle);
-  BinaryMaskOpTestHelperVX<int8_t, int8_t>(
+  BinaryMaskOpTestHelperVX<int8_t, int8_t, RVScalarRegister>(
       "Vmsle8", /*sew*/ 8, instruction_,
       [](int8_t val0, int8_t val1) -> uint8_t {
         return (val0 <= val1) ? 1 : 0;
@@ -1471,7 +1473,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsle16VX) {
   SetSemanticFunction(&Vmsle);
-  BinaryMaskOpTestHelperVX<int16_t, int16_t>(
+  BinaryMaskOpTestHelperVX<int16_t, int16_t, RVScalarRegister>(
       "Vmsle16", /*sew*/ 16, instruction_,
       [](int16_t val0, int16_t val1) -> uint8_t {
         return (val0 <= val1) ? 1 : 0;
@@ -1479,7 +1481,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsle32VX) {
   SetSemanticFunction(&Vmsle);
-  BinaryMaskOpTestHelperVX<int32_t, int32_t>(
+  BinaryMaskOpTestHelperVX<int32_t, int32_t, RVScalarRegister>(
       "Vmsle32", /*sew*/ 32, instruction_,
       [](int32_t val0, int32_t val1) -> uint8_t {
         return (val0 <= val1) ? 1 : 0;
@@ -1487,7 +1489,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsle64VX) {
   SetSemanticFunction(&Vmsle);
-  BinaryMaskOpTestHelperVX<int64_t, int64_t>(
+  BinaryMaskOpTestHelperVX<int64_t, int64_t, RVScalarRegister>(
       "Vmsle64", /*sew*/ 64, instruction_,
       [](int64_t val0, int64_t val1) -> uint8_t {
         return (val0 <= val1) ? 1 : 0;
@@ -1498,7 +1500,7 @@
 // Vector-Vector.
 TEST_F(RiscVVectorInstructionsTest, Vmsgtu8VX) {
   SetSemanticFunction(&Vmsgtu);
-  BinaryMaskOpTestHelperVX<uint8_t, uint8_t>(
+  BinaryMaskOpTestHelperVX<uint8_t, uint8_t, RVScalarRegister>(
       "Vmsgtu8", /*sew*/ 8, instruction_,
       [](uint8_t val0, uint8_t val1) -> uint8_t {
         return (val0 > val1) ? 1 : 0;
@@ -1506,7 +1508,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsgtu16VX) {
   SetSemanticFunction(&Vmsgtu);
-  BinaryMaskOpTestHelperVX<uint16_t, uint16_t>(
+  BinaryMaskOpTestHelperVX<uint16_t, uint16_t, RVScalarRegister>(
       "Vmsgtu16", /*sew*/ 16, instruction_,
       [](uint16_t val0, uint16_t val1) -> uint8_t {
         return (val0 > val1) ? 1 : 0;
@@ -1514,7 +1516,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsgtu32VX) {
   SetSemanticFunction(&Vmsgtu);
-  BinaryMaskOpTestHelperVX<uint32_t, uint32_t>(
+  BinaryMaskOpTestHelperVX<uint32_t, uint32_t, RVScalarRegister>(
       "Vmsgtu32", /*sew*/ 32, instruction_,
       [](uint32_t val0, uint32_t val1) -> uint8_t {
         return (val0 > val1) ? 1 : 0;
@@ -1522,7 +1524,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsgtu64VX) {
   SetSemanticFunction(&Vmsgtu);
-  BinaryMaskOpTestHelperVX<uint64_t, uint64_t>(
+  BinaryMaskOpTestHelperVX<uint64_t, uint64_t, RVScalarRegister>(
       "Vmsgtuk64", /*sew*/ 64, instruction_,
       [](uint64_t val0, uint64_t val1) -> uint8_t {
         return (val0 > val1) ? 1 : 0;
@@ -1533,7 +1535,7 @@
 // Vector-Scalar.
 TEST_F(RiscVVectorInstructionsTest, Vmsgt8VX) {
   SetSemanticFunction(&Vmsgt);
-  BinaryMaskOpTestHelperVX<int8_t, int8_t>(
+  BinaryMaskOpTestHelperVX<int8_t, int8_t, RVScalarRegister>(
       "Vmsgt8", /*sew*/ 8, instruction_,
       [](int8_t val0, int8_t val1) -> uint8_t {
         return (val0 > val1) ? 1 : 0;
@@ -1541,7 +1543,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsgt16VX) {
   SetSemanticFunction(&Vmsgt);
-  BinaryMaskOpTestHelperVX<int16_t, int16_t>(
+  BinaryMaskOpTestHelperVX<int16_t, int16_t, RVScalarRegister>(
       "Vmsgt16", /*sew*/ 16, instruction_,
       [](int16_t val0, int16_t val1) -> uint8_t {
         return (val0 > val1) ? 1 : 0;
@@ -1549,7 +1551,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsgt32VX) {
   SetSemanticFunction(&Vmsgt);
-  BinaryMaskOpTestHelperVX<int32_t, int32_t>(
+  BinaryMaskOpTestHelperVX<int32_t, int32_t, RVScalarRegister>(
       "Vmsgt32", /*sew*/ 32, instruction_,
       [](int32_t val0, int32_t val1) -> uint8_t {
         return (val0 > val1) ? 1 : 0;
@@ -1557,7 +1559,7 @@
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsgt64VX) {
   SetSemanticFunction(&Vmsgt);
-  BinaryMaskOpTestHelperVX<int64_t, int64_t>(
+  BinaryMaskOpTestHelperVX<int64_t, int64_t, RVScalarRegister>(
       "Vmsgt64", /*sew*/ 64, instruction_,
       [](int64_t val0, int64_t val1) -> uint8_t {
         return (val0 > val1) ? 1 : 0;
@@ -1598,22 +1600,22 @@
 // Vector-Scalar
 TEST_F(RiscVVectorInstructionsTest, Vsaddu8VX) {
   SetSemanticFunction(&Vsaddu);
-  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t>(
+  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t, RVScalarRegister>(
       "Vsaddu8", /*sew*/ 8, instruction_, VsadduHelper<uint8_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vsaddu16VX) {
   SetSemanticFunction(&Vsaddu);
-  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t>(
+  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t, RVScalarRegister>(
       "Vsaddu16", /*sew*/ 16, instruction_, VsadduHelper<uint16_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vsaddu32VX) {
   SetSemanticFunction(&Vsaddu);
-  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t>(
+  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t, RVScalarRegister>(
       "Vsaddu32", /*sew*/ 32, instruction_, VsadduHelper<uint32_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vsaddu64VX) {
   SetSemanticFunction(&Vsaddu);
-  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t>(
+  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t, RVScalarRegister>(
       "Vsaddu64", /*sew*/ 64, instruction_, VsadduHelper<uint64_t>);
 }
 
@@ -1659,22 +1661,22 @@
 // Vector-Scalar
 TEST_F(RiscVVectorInstructionsTest, Vsadd8VX) {
   SetSemanticFunction(&Vsadd);
-  BinaryOpTestHelperVX<int8_t, int8_t, int8_t>(
+  BinaryOpTestHelperVX<int8_t, int8_t, int8_t, RVScalarRegister>(
       "Vsadd8", /*sew*/ 8, instruction_, VsaddHelper<int8_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vsadd16VX) {
   SetSemanticFunction(&Vsadd);
-  BinaryOpTestHelperVX<int16_t, int16_t, int16_t>(
+  BinaryOpTestHelperVX<int16_t, int16_t, int16_t, RVScalarRegister>(
       "Vsadd16", /*sew*/ 16, instruction_, VsaddHelper<int16_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vsadd32VX) {
   SetSemanticFunction(&Vsadd);
-  BinaryOpTestHelperVX<int32_t, int32_t, int32_t>(
+  BinaryOpTestHelperVX<int32_t, int32_t, int32_t, RVScalarRegister>(
       "Vsadd32", /*sew*/ 32, instruction_, VsaddHelper<int32_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vsadd64VX) {
   SetSemanticFunction(&Vsadd);
-  BinaryOpTestHelperVX<int64_t, int64_t, int64_t>(
+  BinaryOpTestHelperVX<int64_t, int64_t, int64_t, RVScalarRegister>(
       "Vsadd64", /*sew*/ 64, instruction_, VsaddHelper<int64_t>);
 }
 
@@ -1713,22 +1715,22 @@
 // Vector-Scalar
 TEST_F(RiscVVectorInstructionsTest, Vssubu8VX) {
   SetSemanticFunction(&Vssubu);
-  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t>(
+  BinaryOpTestHelperVX<uint8_t, uint8_t, uint8_t, RVScalarRegister>(
       "Vssubu8", /*sew*/ 8, instruction_, SsubuHelper<uint8_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vssubu16VX) {
   SetSemanticFunction(&Vssubu);
-  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t>(
+  BinaryOpTestHelperVX<uint16_t, uint16_t, uint16_t, RVScalarRegister>(
       "Vssubu16", /*sew*/ 16, instruction_, SsubuHelper<uint16_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vssubu32VX) {
   SetSemanticFunction(&Vssubu);
-  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t>(
+  BinaryOpTestHelperVX<uint32_t, uint32_t, uint32_t, RVScalarRegister>(
       "Vssubu32", /*sew*/ 32, instruction_, SsubuHelper<uint32_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vssubu64VX) {
   SetSemanticFunction(&Vssubu);
-  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t>(
+  BinaryOpTestHelperVX<uint64_t, uint64_t, uint64_t, RVScalarRegister>(
       "Vssubu64", /*sew*/ 64, instruction_, SsubuHelper<uint64_t>);
 }
 
@@ -1769,22 +1771,22 @@
 // Vector-Scalar
 TEST_F(RiscVVectorInstructionsTest, Vssub8VX) {
   SetSemanticFunction(&Vssub);
-  BinaryOpTestHelperVX<int8_t, int8_t, int8_t>(
+  BinaryOpTestHelperVX<int8_t, int8_t, int8_t, RVScalarRegister>(
       "Vssub8", /*sew*/ 8, instruction_, VssubHelper<int8_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vssub16VX) {
   SetSemanticFunction(&Vssub);
-  BinaryOpTestHelperVX<int16_t, int16_t, int16_t>(
+  BinaryOpTestHelperVX<int16_t, int16_t, int16_t, RVScalarRegister>(
       "Vssub16", /*sew*/ 16, instruction_, VssubHelper<int16_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vssub32VX) {
   SetSemanticFunction(&Vssub);
-  BinaryOpTestHelperVX<int32_t, int32_t, int32_t>(
+  BinaryOpTestHelperVX<int32_t, int32_t, int32_t, RVScalarRegister>(
       "Vssub32", /*sew*/ 32, instruction_, VssubHelper<int32_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vssub64VX) {
   SetSemanticFunction(&Vssub);
-  BinaryOpTestHelperVX<int64_t, int64_t, int64_t>(
+  BinaryOpTestHelperVX<int64_t, int64_t, int64_t, RVScalarRegister>(
       "Vssub64", /*sew*/ 64, instruction_, VssubHelper<int64_t>);
 }
 
@@ -1818,22 +1820,22 @@
 // Vector-Scalar.
 TEST_F(RiscVVectorInstructionsTest, Vadc8VX) {
   SetSemanticFunction(&Vadc);
-  BinaryOpWithMaskTestHelperVX<uint8_t, uint8_t, uint8_t>(
+  BinaryOpWithMaskTestHelperVX<uint8_t, uint8_t, uint8_t, RVScalarRegister>(
       "Vadc", /*sew*/ 8, instruction_, VadcHelper<uint8_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vadc16VX) {
   SetSemanticFunction(&Vadc);
-  BinaryOpWithMaskTestHelperVX<uint16_t, uint16_t, uint16_t>(
+  BinaryOpWithMaskTestHelperVX<uint16_t, uint16_t, uint16_t, RVScalarRegister>(
       "Vadc", /*sew*/ 16, instruction_, VadcHelper<uint16_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vadc32VX) {
   SetSemanticFunction(&Vadc);
-  BinaryOpWithMaskTestHelperVX<uint32_t, uint32_t, uint32_t>(
+  BinaryOpWithMaskTestHelperVX<uint32_t, uint32_t, uint32_t, RVScalarRegister>(
       "Vadc", /*sew*/ 32, instruction_, VadcHelper<uint32_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vadc64VX) {
   SetSemanticFunction(&Vadc);
-  BinaryOpWithMaskTestHelperVX<uint64_t, uint64_t, uint64_t>(
+  BinaryOpWithMaskTestHelperVX<uint64_t, uint64_t, uint64_t, RVScalarRegister>(
       "Vadc", /*sew*/ 64, instruction_, VadcHelper<uint64_t>);
 }
 
@@ -1873,22 +1875,22 @@
 // Vector-Scalar.
 TEST_F(RiscVVectorInstructionsTest, Vmadc8VX) {
   SetSemanticFunction(&Vmadc);
-  BinaryMaskOpWithMaskTestHelperVX<uint8_t, uint8_t>(
+  BinaryMaskOpWithMaskTestHelperVX<uint8_t, uint8_t, RVScalarRegister>(
       "Vmadc", /*sew*/ 8, instruction_, VmadcHelper<uint8_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vmadc16VX) {
   SetSemanticFunction(&Vmadc);
-  BinaryMaskOpWithMaskTestHelperVX<uint16_t, uint16_t>(
+  BinaryMaskOpWithMaskTestHelperVX<uint16_t, uint16_t, RVScalarRegister>(
       "Vmadc", /*sew*/ 16, instruction_, VmadcHelper<uint16_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vmadc32VX) {
   SetSemanticFunction(&Vmadc);
-  BinaryMaskOpWithMaskTestHelperVX<uint32_t, uint32_t>(
+  BinaryMaskOpWithMaskTestHelperVX<uint32_t, uint32_t, RVScalarRegister>(
       "Vmadc", /*sew*/ 32, instruction_, VmadcHelper<uint32_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vmadc64VX) {
   SetSemanticFunction(&Vmadc);
-  BinaryMaskOpWithMaskTestHelperVX<uint64_t, uint64_t>(
+  BinaryMaskOpWithMaskTestHelperVX<uint64_t, uint64_t, RVScalarRegister>(
       "Vmadc", /*sew*/ 64, instruction_, VmadcHelper<uint64_t>);
 }
 
@@ -1921,22 +1923,22 @@
 // Vector-Scalar.
 TEST_F(RiscVVectorInstructionsTest, Vsbc8VX) {
   SetSemanticFunction(&Vsbc);
-  BinaryOpWithMaskTestHelperVX<uint8_t, uint8_t, uint8_t>(
+  BinaryOpWithMaskTestHelperVX<uint8_t, uint8_t, uint8_t, RVScalarRegister>(
       "Vsbc", /*sew*/ 8, instruction_, VsbcHelper<uint8_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vsbc16VX) {
   SetSemanticFunction(&Vsbc);
-  BinaryOpWithMaskTestHelperVX<uint16_t, uint16_t, uint16_t>(
+  BinaryOpWithMaskTestHelperVX<uint16_t, uint16_t, uint16_t, RVScalarRegister>(
       "Vsbc", /*sew*/ 16, instruction_, VsbcHelper<uint16_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vsbc32VX) {
   SetSemanticFunction(&Vsbc);
-  BinaryOpWithMaskTestHelperVX<uint32_t, uint32_t, uint32_t>(
+  BinaryOpWithMaskTestHelperVX<uint32_t, uint32_t, uint32_t, RVScalarRegister>(
       "Vsbc", /*sew*/ 32, instruction_, VsbcHelper<uint32_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vsbc64VX) {
   SetSemanticFunction(&Vsbc);
-  BinaryOpWithMaskTestHelperVX<uint64_t, uint64_t, uint64_t>(
+  BinaryOpWithMaskTestHelperVX<uint64_t, uint64_t, uint64_t, RVScalarRegister>(
       "Vsbc", /*sew*/ 64, instruction_, VsbcHelper<uint64_t>);
 }
 
@@ -1972,22 +1974,22 @@
 // Vector-Scalar.
 TEST_F(RiscVVectorInstructionsTest, Vmsbc8VX) {
   SetSemanticFunction(&Vmsbc);
-  BinaryMaskOpWithMaskTestHelperVX<uint8_t, uint8_t>(
+  BinaryMaskOpWithMaskTestHelperVX<uint8_t, uint8_t, RVScalarRegister>(
       "Vmsbc", /*sew*/ 8, instruction_, VmsbcHelper<uint8_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsbc16VX) {
   SetSemanticFunction(&Vmsbc);
-  BinaryMaskOpWithMaskTestHelperVX<uint16_t, uint16_t>(
+  BinaryMaskOpWithMaskTestHelperVX<uint16_t, uint16_t, RVScalarRegister>(
       "Vmsbc", /*sew*/ 16, instruction_, VmsbcHelper<uint16_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsbc32VX) {
   SetSemanticFunction(&Vmsbc);
-  BinaryMaskOpWithMaskTestHelperVX<uint32_t, uint32_t>(
+  BinaryMaskOpWithMaskTestHelperVX<uint32_t, uint32_t, RVScalarRegister>(
       "Vmsbc", /*sew*/ 32, instruction_, VmsbcHelper<uint32_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vmsbc64VX) {
   SetSemanticFunction(&Vmsbc);
-  BinaryMaskOpWithMaskTestHelperVX<uint64_t, uint64_t>(
+  BinaryMaskOpWithMaskTestHelperVX<uint64_t, uint64_t, RVScalarRegister>(
       "Vmsbc", /*sew*/ 64, instruction_, VmsbcHelper<uint64_t>);
 }
 
@@ -2020,22 +2022,22 @@
 // Vector-Scalar.
 TEST_F(RiscVVectorInstructionsTest, Vmerge8VX) {
   SetSemanticFunction(&Vmerge);
-  BinaryOpWithMaskTestHelperVX<uint8_t, uint8_t, uint8_t>(
+  BinaryOpWithMaskTestHelperVX<uint8_t, uint8_t, uint8_t, RVScalarRegister>(
       "Vmerge", /*sew*/ 8, instruction_, VmergeHelper<uint8_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vmerge16VX) {
   SetSemanticFunction(&Vmerge);
-  BinaryOpWithMaskTestHelperVX<uint16_t, uint16_t, uint16_t>(
+  BinaryOpWithMaskTestHelperVX<uint16_t, uint16_t, uint16_t, RVScalarRegister>(
       "Vmerge", /*sew*/ 16, instruction_, VmergeHelper<uint16_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vmerge32VX) {
   SetSemanticFunction(&Vmerge);
-  BinaryOpWithMaskTestHelperVX<uint32_t, uint32_t, uint32_t>(
+  BinaryOpWithMaskTestHelperVX<uint32_t, uint32_t, uint32_t, RVScalarRegister>(
       "mergec", /*sew*/ 32, instruction_, VmergeHelper<uint32_t>);
 }
 TEST_F(RiscVVectorInstructionsTest, Vmerge64VX) {
   SetSemanticFunction(&Vmerge);
-  BinaryOpWithMaskTestHelperVX<uint64_t, uint64_t, uint64_t>(
+  BinaryOpWithMaskTestHelperVX<uint64_t, uint64_t, uint64_t, RVScalarRegister>(
       "Vmerge", /*sew*/ 64, instruction_, VmergeHelper<uint64_t>);
 }
 
@@ -2127,7 +2129,7 @@
   // Iterate across rounding modes.
   for (int rm = 0; rm < 4; rm++) {
     tester->rv_vector()->set_vxrm(rm);
-    tester->BinaryOpTestHelperVX<T, T, T>(
+    tester->BinaryOpTestHelperVX<T, T, T, RVScalarRegister>(
         absl::StrCat("Vssrl_", rm), /*sew*/ sizeof(T) * 8, inst,
         [rm, tester](T vs2, T vs1) -> T {
           return VssrHelper<T>(tester, vs2, vs1, rm);

diff --git a/riscv/test/riscv_vector_opm_instructions_test.cc b/riscv/test/riscv_vector_opm_instructions_test.cc
index ebec892..1a6c396 100644
--- a/riscv/test/riscv_vector_opm_instructions_test.cc
+++ b/riscv/test/riscv_vector_opm_instructions_test.cc

@@ -14,25 +14,21 @@
 
 #include "riscv/riscv_vector_opm_instructions.h"
 
-#include <algorithm>
 #include <cstdint>
 #include <functional>
 #include <ios>
-#include <limits>
-#include <optional>
-#include <string>
 #include <type_traits>
 #include <vector>
 
 #include "absl/base/casts.h"
 #include "absl/log/check.h"
 #include "absl/numeric/int128.h"
-#include "absl/random/random.h"
 #include "absl/strings/str_cat.h"
 #include "absl/strings/string_view.h"
 #include "googlemock/include/gmock/gmock.h"
 #include "mpact/sim/generic/instruction.h"
-#include "riscv/riscv_vector_state.h"
+#include "mpact/sim/generic/type_helpers.h"
+#include "riscv/riscv_register.h"
 #include "riscv/test/riscv_vector_instructions_test_base.h"
 
 namespace {
@@ -40,6 +36,7 @@
 using Instruction = ::mpact::sim::generic::Instruction;
 using ::mpact::sim::generic::WideType;
 using ::mpact::sim::riscv::test::RiscVVectorInstructionsTestBase;
+using RVScalarRegister = ::mpact::sim::riscv::RV32Register;
 
 using ::mpact::sim::riscv::Vaadd;
 using ::mpact::sim::riscv::Vaaddu;
@@ -192,7 +189,7 @@
 template <typename T>
 inline void VaadduVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   tester->SetSemanticFunction(&Vaaddu);
-  tester->BinaryOpTestHelperVX<T, T, T>(
+  tester->BinaryOpTestHelperVX<T, T, T, RVScalarRegister>(
       absl::StrCat("Vaaddu", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [tester](T val0, T val1) -> T {
         return VaaddHelper(tester, val0, val1);
@@ -235,7 +232,7 @@
 template <typename T>
 inline void VaaddVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   tester->SetSemanticFunction(&Vaadd);
-  tester->BinaryOpTestHelperVX<T, T, T>(
+  tester->BinaryOpTestHelperVX<T, T, T, RVScalarRegister>(
       absl::StrCat("Vaaddu", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [tester](T val0, T val1) -> T {
         return VaaddHelper(tester, val0, val1);
@@ -277,7 +274,7 @@
 template <typename T>
 inline void VasubuVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   tester->SetSemanticFunction(&Vasubu);
-  tester->BinaryOpTestHelperVX<T, T, T>(
+  tester->BinaryOpTestHelperVX<T, T, T, RVScalarRegister>(
       absl::StrCat("Vasubu", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [tester](T val0, T val1) -> T {
         return VasubHelper(tester, val0, val1);
@@ -319,7 +316,7 @@
 template <typename T>
 inline void VasubVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   tester->SetSemanticFunction(&Vasub);
-  tester->BinaryOpTestHelperVX<T, T, T>(
+  tester->BinaryOpTestHelperVX<T, T, T, RVScalarRegister>(
       absl::StrCat("Vasub", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [tester](T val0, T val1) -> T {
         return VasubHelper(tester, val0, val1);
@@ -413,7 +410,7 @@
 template <typename T>
 inline void VdivuVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   tester->SetSemanticFunction(&Vdivu);
-  tester->BinaryOpTestHelperVX<T, T, T>(
+  tester->BinaryOpTestHelperVX<T, T, T, RVScalarRegister>(
       absl::StrCat("Vdivu", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1) -> T {
         if (vs1 == 0) return ~vs1;
@@ -457,7 +454,7 @@
 template <typename T>
 inline void VdivVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   tester->SetSemanticFunction(&Vdiv);
-  tester->BinaryOpTestHelperVX<T, T, T>(
+  tester->BinaryOpTestHelperVX<T, T, T, RVScalarRegister>(
       absl::StrCat("Vdiv", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1) -> T {
         if (vs1 == 0) return ~vs1;
@@ -501,7 +498,7 @@
 template <typename T>
 inline void VremuVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   tester->SetSemanticFunction(&Vremu);
-  tester->BinaryOpTestHelperVX<T, T, T>(
+  tester->BinaryOpTestHelperVX<T, T, T, RVScalarRegister>(
       absl::StrCat("Vremu", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1) -> T {
         if (vs1 == 0) return vs2;
@@ -545,7 +542,7 @@
 template <typename T>
 inline void VremVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   tester->SetSemanticFunction(&Vrem);
-  tester->BinaryOpTestHelperVX<T, T, T>(
+  tester->BinaryOpTestHelperVX<T, T, T, RVScalarRegister>(
       absl::StrCat("Vrem", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1) -> T {
         if (vs1 == 0) return vs2;
@@ -591,7 +588,7 @@
 template <typename T>
 inline void VmulhuVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   tester->SetSemanticFunction(&Vmulhu);
-  tester->BinaryOpTestHelperVX<T, T, T>(
+  tester->BinaryOpTestHelperVX<T, T, T, RVScalarRegister>(
       absl::StrCat("Vmulhu", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1) -> T {
         absl::uint128 vs2_w = static_cast<absl::uint128>(vs2);
@@ -640,7 +637,7 @@
 template <typename T>
 inline void VmulhVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   tester->SetSemanticFunction(&Vmulh);
-  tester->BinaryOpTestHelperVX<T, T, T>(
+  tester->BinaryOpTestHelperVX<T, T, T, RVScalarRegister>(
       absl::StrCat("Vmulh", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1) -> T {
         absl::int128 vs2_w = static_cast<absl::int128>(vs2);
@@ -688,7 +685,7 @@
 inline void VmulVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   using WT = typename WideType<T>::type;
   tester->SetSemanticFunction(&Vmul);
-  tester->BinaryOpTestHelperVX<T, T, T>(
+  tester->BinaryOpTestHelperVX<T, T, T, RVScalarRegister>(
       absl::StrCat("Vmul", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1) -> T {
         return static_cast<T>(static_cast<WT>(vs2) * static_cast<WT>(vs1));
@@ -736,7 +733,7 @@
 inline void VmulhsuVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   using ST = typename std::make_signed<T>::type;
   tester->SetSemanticFunction(&Vmulhsu);
-  tester->BinaryOpTestHelperVX<T, ST, T>(
+  tester->BinaryOpTestHelperVX<T, ST, T, RVScalarRegister>(
       absl::StrCat("Vmulhsu", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](ST vs2, T vs1) -> T {
         absl::int128 vs2_w = static_cast<absl::int128>(vs2);
@@ -789,7 +786,7 @@
 template <typename T>
 inline void VmaddVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   tester->SetSemanticFunction(&Vmadd);
-  tester->TernaryOpTestHelperVX<T, T, T>(
+  tester->TernaryOpTestHelperVX<T, T, T, RVScalarRegister>(
       absl::StrCat("Vmadd", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1, T vd) {
         if (sizeof(T) < 4) {
@@ -846,7 +843,7 @@
 template <typename T>
 inline void VnmsubVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   tester->SetSemanticFunction(&Vnmsub);
-  tester->TernaryOpTestHelperVX<T, T, T>(
+  tester->TernaryOpTestHelperVX<T, T, T, RVScalarRegister>(
       absl::StrCat("Vnmsub", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1, T vd) {
         if (sizeof(T) < 4) {
@@ -903,7 +900,7 @@
 template <typename T>
 inline void VmaccVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   tester->SetSemanticFunction(&Vmacc);
-  tester->TernaryOpTestHelperVX<T, T, T>(
+  tester->TernaryOpTestHelperVX<T, T, T, RVScalarRegister>(
       absl::StrCat("Vmacc", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1, T vd) {
         if (sizeof(T) < 4) {
@@ -960,7 +957,7 @@
 template <typename T>
 inline void VnmsacVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   tester->SetSemanticFunction(&Vnmsac);
-  tester->TernaryOpTestHelperVX<T, T, T>(
+  tester->TernaryOpTestHelperVX<T, T, T, RVScalarRegister>(
       absl::StrCat("Vnmsac", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1, T vd) {
         if (sizeof(T) < 4) {
@@ -1012,7 +1009,7 @@
 inline void VwadduVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   using WT = typename WideType<T>::type;
   tester->SetSemanticFunction(&Vwaddu);
-  tester->BinaryOpTestHelperVX<WT, T, T>(
+  tester->BinaryOpTestHelperVX<WT, T, T, RVScalarRegister>(
       absl::StrCat("Vwaddu", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1) -> WT {
         return static_cast<WT>(vs2) + static_cast<WT>(vs1);
@@ -1055,7 +1052,7 @@
 inline void VwsubuVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   using WT = typename WideType<T>::type;
   tester->SetSemanticFunction(&Vwsubu);
-  tester->BinaryOpTestHelperVX<WT, T, T>(
+  tester->BinaryOpTestHelperVX<WT, T, T, RVScalarRegister>(
       absl::StrCat("Vwsubu", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1) -> WT {
         return static_cast<WT>(vs2) - static_cast<WT>(vs1);
@@ -1098,7 +1095,7 @@
 inline void VwaddVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   using WT = typename WideType<T>::type;
   tester->SetSemanticFunction(&Vwadd);
-  tester->BinaryOpTestHelperVX<WT, T, T>(
+  tester->BinaryOpTestHelperVX<WT, T, T, RVScalarRegister>(
       absl::StrCat("Vwadd", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1) -> WT {
         return static_cast<WT>(vs2) + static_cast<WT>(vs1);
@@ -1144,7 +1141,7 @@
 inline void VwsubVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   using WT = typename WideType<T>::type;
   tester->SetSemanticFunction(&Vwsub);
-  tester->BinaryOpTestHelperVX<WT, T, T>(
+  tester->BinaryOpTestHelperVX<WT, T, T, RVScalarRegister>(
       absl::StrCat("Vwsub", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1) -> WT {
         WT vs2_w = vs2;
@@ -1189,7 +1186,7 @@
 inline void VwadduwVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   using WT = typename WideType<T>::type;
   tester->SetSemanticFunction(&Vwadduw);
-  tester->BinaryOpTestHelperVX<WT, WT, T>(
+  tester->BinaryOpTestHelperVX<WT, WT, T, RVScalarRegister>(
       absl::StrCat("Vwadduw", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(),
       [](WT vs2, T vs1) -> WT { return vs2 + static_cast<WT>(vs1); });
@@ -1230,7 +1227,7 @@
 inline void VwsubuwVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   using WT = typename WideType<T>::type;
   tester->SetSemanticFunction(&Vwsubuw);
-  tester->BinaryOpTestHelperVX<WT, WT, T>(
+  tester->BinaryOpTestHelperVX<WT, WT, T, RVScalarRegister>(
       absl::StrCat("Vwsubuw", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(),
       [](WT vs2, T vs1) -> WT { return vs2 - static_cast<WT>(vs1); });
@@ -1271,7 +1268,7 @@
 inline void VwaddwVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   using WT = typename WideType<T>::type;
   tester->SetSemanticFunction(&Vwaddw);
-  tester->BinaryOpTestHelperVX<WT, WT, T>(
+  tester->BinaryOpTestHelperVX<WT, WT, T, RVScalarRegister>(
       absl::StrCat("Vwaddw", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(),
       [](WT vs2, T vs1) -> WT { return vs2 + static_cast<WT>(vs1); });
@@ -1312,7 +1309,7 @@
 inline void VwsubwVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   using WT = typename WideType<T>::type;
   tester->SetSemanticFunction(&Vwsubw);
-  tester->BinaryOpTestHelperVX<WT, WT, T>(
+  tester->BinaryOpTestHelperVX<WT, WT, T, RVScalarRegister>(
       absl::StrCat("Vwsubw", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(),
       [](WT vs2, T vs1) -> WT { return vs2 - static_cast<WT>(vs1); });
@@ -1354,7 +1351,7 @@
 inline void VwmuluVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   using WT = typename WideType<T>::type;
   tester->SetSemanticFunction(&Vwmulu);
-  tester->BinaryOpTestHelperVX<WT, T, T>(
+  tester->BinaryOpTestHelperVX<WT, T, T, RVScalarRegister>(
       absl::StrCat("Vwmulu", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1) -> WT {
         return static_cast<WT>(vs2) * static_cast<WT>(vs1);
@@ -1397,7 +1394,7 @@
 inline void VwmulVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   using WT = typename WideType<T>::type;
   tester->SetSemanticFunction(&Vwmul);
-  tester->BinaryOpTestHelperVX<WT, T, T>(
+  tester->BinaryOpTestHelperVX<WT, T, T, RVScalarRegister>(
       absl::StrCat("Vwmul", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1) -> WT {
         return static_cast<WT>(vs2) * static_cast<WT>(vs1);
@@ -1442,7 +1439,7 @@
   using WT = typename WideType<T>::type;
   using UT = typename std::make_unsigned<T>::type;
   tester->SetSemanticFunction(&Vwmulsu);
-  tester->BinaryOpTestHelperVX<WT, T, T>(
+  tester->BinaryOpTestHelperVX<WT, T, T, RVScalarRegister>(
       absl::StrCat("Vwmulsu", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, UT vs1) -> WT {
         return static_cast<WT>(vs2) * static_cast<WT>(vs1);
@@ -1485,7 +1482,7 @@
 inline void VwmaccuVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   using WT = typename WideType<T>::type;
   tester->SetSemanticFunction(&Vwmaccu);
-  tester->TernaryOpTestHelperVX<WT, T, T>(
+  tester->TernaryOpTestHelperVX<WT, T, T, RVScalarRegister>(
       absl::StrCat("Vwmaccu", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1, WT vd) {
         return static_cast<WT>(vs2) * static_cast<WT>(vs1) + vd;
@@ -1531,7 +1528,7 @@
 inline void VwmaccVXHelper(RiscVVectorOpmInstructionsTest *tester) {
   using WT = typename WideType<T>::type;
   tester->SetSemanticFunction(&Vwmacc);
-  tester->TernaryOpTestHelperVX<WT, T, T>(
+  tester->TernaryOpTestHelperVX<WT, T, T, RVScalarRegister>(
       absl::StrCat("Vwmacc", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, T vs1, WT vd) -> WT {
         WT vs1_w = vs1;
@@ -1584,7 +1581,7 @@
   using WT = typename WideType<T>::type;
   using UT = typename std::make_unsigned<T>::type;
   tester->SetSemanticFunction(&Vwmaccus);
-  tester->TernaryOpTestHelperVX<WT, T, UT>(
+  tester->TernaryOpTestHelperVX<WT, T, UT, RVScalarRegister>(
       absl::StrCat("Vwmaccus", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](T vs2, UT vs1, WT vd) -> WT {
         using UWT = typename std::make_unsigned<WT>::type;
@@ -1637,7 +1634,7 @@
   using WT = typename WideType<T>::type;
   using UT = typename std::make_unsigned<T>::type;
   tester->SetSemanticFunction(&Vwmaccsu);
-  tester->TernaryOpTestHelperVX<WT, UT, T>(
+  tester->TernaryOpTestHelperVX<WT, UT, T, RVScalarRegister>(
       absl::StrCat("Vwmaccsu", sizeof(T) * 8, "vx"), /*sew*/ sizeof(T) * 8,
       tester->instruction(), [](UT vs2, T vs1, WT vd) -> WT {
         using UWT = typename std::make_unsigned<WT>::type;