Resolve destination operand for vrsub_vi

PiperOrigin-RevId: 893724791
Change-Id: I8729b79d1e11a3598a6c88d781465e45967bf2b0

riscv/riscv32_renode.cc

diff --git a/riscv/riscv32_renode.cc b/riscv/riscv32_renode.cc
index 19f8b1e..d6574b5 100644
--- a/riscv/riscv32_renode.cc
+++ b/riscv/riscv32_renode.cc
@@ -11,6 +11,6 @@
     std::string name, std::string cpu_type,
     ::mpact::sim::util::MemoryInterface* renode_sysbus) {
   auto* top = new ::mpact::sim::riscv::RiscVRenode(
-      name, renode_sysbus, ::mpact::sim::riscv::RiscVXlen ::RV32);
+      name, renode_sysbus, ::mpact::sim::riscv::RiscVXlen::RV32);
   return top;
 }

riscv/riscv_state.cc

diff --git a/riscv/riscv_state.cc b/riscv/riscv_state.cc
index 29f6ea5..3a2d616 100644
--- a/riscv/riscv_state.cc
+++ b/riscv/riscv_state.cc
@@ -232,7 +232,7 @@
 
   // minstret/minstreth
   auto* minstret = CreateCsr<RiscVPerformanceCounterCsr<T, RiscVState>>(
-      state, csr_vec, "minstret", RiscVCsrEnum ::kMInstret, state);
+      state, csr_vec, "minstret", RiscVCsrEnum::kMInstret, state);
   CHECK_NE(minstret, nullptr);
   if (std::is_same_v<T, uint32_t>) {
     CHECK_NE(

riscv/riscv_vector.isa

diff --git a/riscv/riscv_vector.isa b/riscv/riscv_vector.isa
index b850cc0..1d48d73 100644
--- a/riscv/riscv_vector.isa
+++ b/riscv/riscv_vector.isa
@@ -476,7 +476,7 @@
     vrsub_vx{: vs2, rs1, vmask : vd},
       disasm: "vrsub.vx", "%vd, %vs2, %rs1, %vmask",
       semfunc: "&Vrsub";
-    vrsub_vi{: vs2, simm5, vmask, vd},
+    vrsub_vi{: vs2, simm5, vmask : vd},
       disasm: "vrsub.vi", "%vd, %simm5, %vmask",
       semfunc: "&Vrsub";
     vminu_vv{: vs2, vs1, vmask : vd},