Updated repo to stay in sync with mpact_sim and mpact_riscv. Change-Id: I5455ec2bcb5b1758031dbb3a794db1153b28b9de

diff --git a/.bazeliskrc b/.bazeliskrc
new file mode 100644
index 0000000..e254530
--- /dev/null
+++ b/.bazeliskrc

@@ -0,0 +1 @@
+USE_BAZEL_VERSION=7.1.2

diff --git a/.bazelrc b/.bazelrc
index f665ef4..f400d64 100644
--- a/.bazelrc
+++ b/.bazelrc

@@ -1,4 +1,4 @@
-# Copyright 2023 Google LLC
+# Copyright 2023-2024 Google LLC
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.
@@ -14,5 +14,13 @@
 
 # Build configurations for the project
 build --action_env=BAZEL_CXXOPTS="-std=c++17"
-build --action_env=CC="clang"
+build --action_env=CC="clang" 
 
+# Disable warnings we don't care about or that generally have a low signal/noise
+# ratio.
+
+build --copt=-Wno-unused-function --cxxopt="-std=c++17"
+build --host_copt=-Wno-unused-function --host_cxxopt="-std=c++17"
+# TODO: migrate all dependencies from WORKSPACE to MODULE.bazel
+# https://github.com/protocolbuffers/protobuf/issues/14313
+common --noenable_bzlmod
\ No newline at end of file

diff --git a/WORKSPACE b/WORKSPACE
index 76e71c8..9357ab5 100644
--- a/WORKSPACE
+++ b/WORKSPACE

@@ -14,149 +14,27 @@
 
 workspace(name = "com_google_mpact-sim-codelabs")
 
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive", "http_file")
-load("@bazel_tools//tools/build_defs/repo:git.bzl", "git_repository")
+# First load the immediate repo dependencies (mpact-sim).
+load("@com_google_mpact-sim-codelabs//:repos.bzl", "mpact_sim_codelabs_repos")
 
-# Additional bazel rules.
-http_archive(
-    name = "bazel_skylib",
-    sha256 = "b8a1527901774180afc798aeb28c4634bdccf19c4d98e7bdd1ce79d1fe9aaad7",
-    urls = ["https://github.com/bazelbuild/bazel-skylib/releases/download/1.4.1/bazel-skylib-1.4.1.tar.gz"],
-)
+mpact_sim_codelabs_repos()
 
-load("@bazel_skylib//:workspace.bzl", "bazel_skylib_workspace")
+# Next load in the riscv immediate dependency
+load("@com_google_mpact-sim-codelabs//:riscv_repos.bzl", "mpact_sim_codelabs_riscv_repos")
 
-bazel_skylib_workspace()
+mpact_sim_codelabs_riscv_repos()
 
-# Google Absail.
-http_archive(
-    name = "com_google_absl",
-    sha256 = "3ea49a7d97421b88a8c48a0de16c16048e17725c7ec0f1d3ea2683a2a75adc21",
-    strip_prefix = "abseil-cpp-20230125.0",
-    urls = ["https://github.com/abseil/abseil-cpp/archive/refs/tags/20230125.0.tar.gz"],
-)
+# Next load in the transitive repo dependencies
+load("@com_google_mpact-sim-codelabs//:riscv_dep_repos.bzl", "mpact_sim_codelabs_riscv_dep_repos");
 
-# Google protobuf.
-http_archive(
-    name = "com_google_protobuf",
-    sha256 = "4eab9b524aa5913c6fffb20b2a8abf5ef7f95a80bc0701f3a6dbb4c607f73460",
-    strip_prefix = "protobuf-3.21.12",
-    urls = ["https://github.com/protocolbuffers/protobuf/releases/download/v21.12/protobuf-cpp-3.21.12.tar.gz"],
-)
+mpact_sim_codelabs_riscv_dep_repos()
 
-# Google re2
-http_archive(
-    name = "com_google_re2",
-    sha256 = "7a9a4824958586980926a300b4717202485c4b4115ac031822e29aa4ef207e48",
-    strip_prefix = "re2-2023-03-01",
-    urls = ["https://github.com/google/re2/archive/refs/tags/2023-03-01.tar.gz"],
-)
+# Call the deps function. It will call any other dependent deps functions.
+load("@com_google_mpact-sim-codelabs//:deps.bzl", "mpact_sim_codelabs_deps");
 
-# ELFIO header based library.
-http_archive(
-    name = "com_github_serge1_elfio",
-    build_file = "@mpact-sim//:external/BUILD.elfio",
-    sha256 = "767b269063fc35aba6d361139f830aa91c45dc6b77942f082666876c1aa0be0f",
-    strip_prefix = "elfio-3.9",
-    urls = ["https://github.com/serge1/ELFIO/releases/download/Release_3.9/elfio-3.9.tar.gz"],
-)
+mpact_sim_codelabs_deps()
 
-# Bazel rules for proto.
-http_archive(
-    name = "rules_proto_grpc",
-    sha256 = "fb7fc7a3c19a92b2f15ed7c4ffb2983e956625c1436f57a3430b897ba9864059",
-    strip_prefix = "rules_proto_grpc-4.3.0",
-    urls = ["https://github.com/rules-proto-grpc/rules_proto_grpc/archive/4.3.0.tar.gz"],
-)
+# Load the protobuf deps from mpact_sim
+load("@com_google_mpact-sim//:protobuf_deps.bzl", "mpact_sim_protobuf_deps")
 
-# Google test.
-http_archive(
-    name = "com_google_googletest",
-    sha256 = "ad7fdba11ea011c1d925b3289cf4af2c66a352e18d4c7264392fead75e919363",
-    strip_prefix = "googletest-1.13.0",
-    urls = ["https://github.com/google/googletest/archive/refs/tags/v1.13.0.tar.gz"],
-)
-
-ALL_CONTENT = """\
-filegroup(
-  name = "all_srcs",
-  srcs = glob(["**"]),
-  visibility = ["//visibility:public"],
-)
-"""
-
-# Antlr4 c++ runtime.
-http_archive(
-    name = "org_antlr4_cpp_runtime",
-    build_file = "@mpact-sim//:external/BUILD.antlr4",
-    sha256 = "8018c335316e61bb768e5bd4a743a9303070af4e1a8577fa902cd053c17249da",
-    urls = ["https://www.antlr.org/download/antlr4-cpp-runtime-4.11.1-source.zip"],
-)
-
-# Antlr4 tool (java).
-http_file(
-    name = "org_antlr_tool",
-    sha256 = "62975e192b4af2622b72b5f0131553ee3cbce97f76dc2a41632dcc55e25473e1",
-    url = "https://www.antlr.org/download/antlr-4.11.1-complete.jar",
-)
-
-# Additional rules for building non-bazel projects. Antlr4 builds using cmake.
-http_archive(
-    name = "rules_foreign_cc",
-    sha256 = "2a4d07cd64b0719b39a7c12218a3e507672b82a97b98c6a89d38565894cf7c51",
-    strip_prefix = "rules_foreign_cc-0.9.0",
-    url = "https://github.com/bazelbuild/rules_foreign_cc/archive/refs/tags/0.9.0.tar.gz",
-)
-
-# MPACT-Sim repo
-http_archive(
-    name = "mpact-sim",
-    sha256 = "8464cf3a56cbd33f73cb83943ce5ce51547cede06278546bdb187cf19fe917b2",
-    strip_prefix = "mpact-sim-0.0.2",
-    url = "https://github.com/google/mpact-sim/archive/refs/tags/0.0.2.tar.gz",
-)
-
-# MPACT-RiscV repo
-http_archive(
-    name = "mpact-riscv",
-    sha256 = "780d54cb2d3723ab2097fb339d894a29e5e752e2cdb7e4fe65f5ddf39087f68a",
-    strip_prefix = "mpact-riscv-0.0.2",
-    url = "https://github.com/google/mpact-riscv/archive/refs/tags/0.0.2.tar.gz",
-)
-
-# Binding to tool targets in mpact-sim. This is required for the macros
-# in mpact_sim_isa.bzl to work properly when generating code for the
-# decoders. These create the //external:decoder_gen and
-# //external:bin_format_gen aliases used in mpact_sim_isa.bzl.
-bind(
-    name = "decoder_gen",
-    actual = "@mpact-sim//mpact/sim/decoder:decoder_gen",
-)
-
-bind(
-    name = "bin_format_gen",
-    actual = "@mpact-sim//mpact/sim/decoder:bin_format_gen",
-)
-
-# Additional rules for licenses
-http_archive(
-    name = "rules_license",
-    sha256 = "6157e1e68378532d0241ecd15d3c45f6e5cfd98fc10846045509fb2a7cc9e381",
-    url = "https://github.com/bazelbuild/rules_license/releases/download/0.0.4/rules_license-0.0.4.tar.gz",
-)
-
-load("@rules_foreign_cc//foreign_cc:repositories.bzl", "rules_foreign_cc_dependencies")
-
-rules_foreign_cc_dependencies()
-
-load("@rules_proto_grpc//:repositories.bzl", "rules_proto_grpc_repos", "rules_proto_grpc_toolchains")
-
-rules_proto_grpc_toolchains()
-
-rules_proto_grpc_repos()
-
-load("@rules_proto//proto:repositories.bzl", "rules_proto_dependencies", "rules_proto_toolchains")
-
-rules_proto_dependencies()
-
-rules_proto_toolchains()
+mpact_sim_protobuf_deps()

diff --git a/dep_repos.bzl b/dep_repos.bzl
new file mode 100644
index 0000000..c712389
--- /dev/null
+++ b/dep_repos.bzl

@@ -0,0 +1,22 @@
+# Copyright 2024 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     https://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Call the first level dependent repos to load their dependencies."""
+
+load("@com_google_mpact-sim//:repos.bzl", "mpact_sim_repos")
+
+def mpact_sim_codelabs_dep_repos():
+    """ Extra dependencies to finish setting up repositories"""
+
+    mpact_sim_repos()

diff --git a/deps.bzl b/deps.bzl
new file mode 100644
index 0000000..daf61bd
--- /dev/null
+++ b/deps.bzl

@@ -0,0 +1,22 @@
+# Copyright 2024 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     https://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Set up extra repositories with the dependencies"""
+
+load("@com_google_mpact-riscv//:deps.bzl", "mpact_riscv_deps")
+
+def mpact_sim_codelabs_deps():
+    """ Extra dependencies to finish setting up repositories"""
+
+    mpact_riscv_deps()

diff --git a/other/BUILD b/other/BUILD
index 74c5553..661c067 100644
--- a/other/BUILD
+++ b/other/BUILD

@@ -25,8 +25,8 @@
         "riscv_simple_state.cc",
     ],
     hdrs = [
-        "riscv_simple_state.h",
         "riscv_register.h",
+        "riscv_simple_state.h",
     ],
     deps = [
         "@com_google_absl//absl/container:flat_hash_map",
@@ -37,11 +37,11 @@
         "@com_google_absl//absl/status:statusor",
         "@com_google_absl//absl/strings",
         "@com_google_absl//absl/types:any",
-        "@mpact-sim//mpact/sim/generic:arch_state",
-        "@mpact-sim//mpact/sim/generic:core",
-        "@mpact-sim//mpact/sim/generic:instruction",
-        "@mpact-sim//mpact/sim/generic:type_helpers",
-        "@mpact-sim//mpact/sim/util/memory",
+        "@com_google_mpact-sim//mpact/sim/generic:arch_state",
+        "@com_google_mpact-sim//mpact/sim/generic:core",
+        "@com_google_mpact-sim//mpact/sim/generic:instruction",
+        "@com_google_mpact-sim//mpact/sim/generic:type_helpers",
+        "@com_google_mpact-sim//mpact/sim/util/memory",
     ],
 )
 
@@ -61,13 +61,14 @@
         "@com_google_absl//absl/status",
         "@com_google_absl//absl/status:statusor",
         "@com_google_absl//absl/strings",
-        "@mpact-riscv//riscv:riscv32_htif_semihost",
-        "@mpact-riscv//riscv:riscv_breakpoint",
-        "@mpact-sim//mpact/sim/generic:component",
-        "@mpact-sim//mpact/sim/generic:core",
-        "@mpact-sim//mpact/sim/generic:core_debug_interface",
-        "@mpact-sim//mpact/sim/generic:decode_cache",
-        "@mpact-sim//mpact/sim/util/memory",
+        "@com_google_mpact-riscv//riscv:riscv32_htif_semihost",
+        "@com_google_mpact-riscv//riscv:riscv_breakpoint",
+        "@com_google_mpact-riscv//riscv:riscv_state",
+        "@com_google_mpact-sim//mpact/sim/generic:component",
+        "@com_google_mpact-sim//mpact/sim/generic:core",
+        "@com_google_mpact-sim//mpact/sim/generic:core_debug_interface",
+        "@com_google_mpact-sim//mpact/sim/generic:decode_cache",
+        "@com_google_mpact-sim//mpact/sim/util/memory",
     ],
 )
 
@@ -86,12 +87,11 @@
         "@com_google_absl//absl/flags:parse",
         "@com_google_absl//absl/status",
         "@com_google_absl//absl/strings",
-        "@mpact-riscv//riscv:debug_command_shell",
-        "@mpact-riscv//riscv:riscv32_htif_semihost",
-        "@mpact-sim//mpact/sim/generic:core",
-        "@mpact-sim//mpact/sim/proto:component_data_cc_proto",
-        "@mpact-sim//mpact/sim/util/memory",
-        "@mpact-sim//mpact/sim/util/program_loader:elf_loader",
+        "@com_google_mpact-riscv//riscv:debug_command_shell",
+        "@com_google_mpact-riscv//riscv:riscv32_htif_semihost",
+        "@com_google_mpact-sim//mpact/sim/generic:core",
+        "@com_google_mpact-sim//mpact/sim/proto:component_data_cc_proto",
+        "@com_google_mpact-sim//mpact/sim/util/memory",
+        "@com_google_mpact-sim//mpact/sim/util/program_loader:elf_loader",
     ],
 )
-

diff --git a/other/rv32i_sim.cc b/other/rv32i_sim.cc
index 8584985..e8136a5 100644
--- a/other/rv32i_sim.cc
+++ b/other/rv32i_sim.cc

@@ -131,7 +131,8 @@
   // Determine if this is being run interactively or as a batch job.
   bool interactive = absl::GetFlag(FLAGS_i) || absl::GetFlag(FLAGS_interactive);
   if (interactive) {
-    mpact::sim::riscv::DebugCommandShell cmd_shell({{&rv32i_top, &elf_loader}});
+    mpact::sim::riscv::DebugCommandShell cmd_shell;
+    cmd_shell.AddCore({&rv32i_top, [&elf_loader]() { return &elf_loader;}});
     cmd_shell.Run(std::cin, std::cout);
   } else {
     std::cerr << "Starting simulation\n";

diff --git a/other/rv32i_top.cc b/other/rv32i_top.cc
index 6574ea5..3a0ff62 100644
--- a/other/rv32i_top.cc
+++ b/other/rv32i_top.cc

@@ -25,13 +25,17 @@
 #include "absl/status/status.h"
 #include "absl/strings/str_cat.h"
 #include "mpact/sim/generic/data_buffer.h"
+#include "mpact/sim/generic/type_helpers.h"
 #include "riscv/riscv32_htif_semihost.h"
+#include "riscv/riscv_action_point.h"
 #include "riscv/riscv_breakpoint.h"
 
 namespace mpact {
 namespace sim {
 namespace codelab {
 
+
+using ::mpact::sim::generic::operator*;  // NOLINT: used below (clang error).
 using generic::DataBuffer;
 using riscv::RiscVXlen;
 
@@ -61,9 +65,13 @@
   // Register instruction counter.
   CHECK_OK(AddCounter(&counter_num_instructions_))
       << "Failed to register counter";
-  rv_bp_manager_ = new RiscVBreakpointManager(
+
+  rv_ap_manager_ = new RiscVActionPointManager(
       memory_,
       absl::bind_front(&generic::DecodeCache::Invalidate, rv32_decode_cache_));
+  rv_bp_manager_ = new RiscVBreakpointManager(
+      rv_ap_manager_,
+      [this](HaltReason halt_reason) { RequestHalt(halt_reason, nullptr); });
   // Set the software breakpoint callback.
   state_->AddEbreakHandler([this](const Instruction *inst) -> bool {
     // If there is a breakpoint, handle it and return true to signal that
@@ -93,6 +101,7 @@
 
   delete rv32_semihost_;
   delete rv_bp_manager_;
+  delete rv_ap_manager_;
   delete rv32_decode_cache_;
   delete rv32_decoder_;
   delete state_;
@@ -264,8 +273,8 @@
   return run_status_;
 }
 
-absl::StatusOr<RV32ITop::HaltReason> RV32ITop::GetLastHaltReason() {
-  return halt_reason_;
+absl::StatusOr<RV32ITop::HaltReasonValueType> RV32ITop::GetLastHaltReason() {
+  return *halt_reason_;
 }
 
 absl::StatusOr<uint64_t> RV32ITop::ReadRegister(const std::string &name) {
@@ -343,6 +352,21 @@
   return absl::OkStatus();
 }
 
+absl::StatusOr<DataBuffer *> RV32ITop::GetRegisterDataBuffer(
+    const std::string &name) {
+  // The registers aren't protected by a mutex, so let's not access them while
+  // the simulator is running.
+  if (run_status_ != RunStatus::kHalted) {
+    return absl::FailedPreconditionError(
+        "GetRegisterDataBuffer: Core must be halted");
+  }
+  auto iter = state_->registers()->find(name);
+  if (iter == state_->registers()->end()) {
+    return absl::NotFoundError(absl::StrCat("Register '", name, "' not found"));
+  }
+  return iter->second->data_buffer();
+}
+
 absl::StatusOr<size_t> RV32ITop::ReadMemory(uint64_t address, void *buffer,
                                             size_t length) {
   if (run_status_ != RunStatus::kHalted) {

diff --git a/other/rv32i_top.h b/other/rv32i_top.h
index 641244b..b132e4e 100644
--- a/other/rv32i_top.h
+++ b/other/rv32i_top.h

@@ -29,6 +29,7 @@
 #include "mpact/sim/util/memory/memory_watcher.h"
 #include "other/riscv_simple_state.h"
 #include "riscv/riscv32_htif_semihost.h"
+#include "riscv/riscv_action_point.h"
 #include "riscv/riscv_breakpoint.h"
 #include "riscv/riscv_register.h"
 #include "riscv_full_decoder/solution/riscv32_decoder.h"
@@ -40,6 +41,7 @@
 
 using riscv::RiscV32HtifSemiHost;
 using riscv::RiscVBreakpointManager;
+using riscv::RiscVActionPointManager;
 using riscv::RiscVState;
 using riscv::RV32Register;
 
@@ -49,7 +51,7 @@
 class RV32ITop : public generic::Component, public generic::CoreDebugInterface {
  public:
   using RunStatus = generic::CoreDebugInterface::RunStatus;
-  using HaltReason = generic::CoreDebugInterface::HaltReason;
+  using HaltReasonValueType = generic::CoreDebugInterface::HaltReasonValueType;
   using SemiHostAddresses = RiscV32HtifSemiHost::SemiHostAddresses;
 
   explicit RV32ITop(std::string name);
@@ -62,11 +64,12 @@
   absl::Status Wait() override;
 
   absl::StatusOr<RunStatus> GetRunStatus() override;
-  absl::StatusOr<HaltReason> GetLastHaltReason() override;
+  absl::StatusOr<HaltReasonValueType> GetLastHaltReason() override;
 
   absl::StatusOr<uint64_t> ReadRegister(const std::string &name) override;
   absl::Status WriteRegister(const std::string &name, uint64_t value) override;
-
+  absl::StatusOr<generic::DataBuffer *> GetRegisterDataBuffer(
+      const std::string &name) override;
   // Read and Write memory methods bypass any semihosting.
   absl::StatusOr<size_t> ReadMemory(uint64_t address, void *buf,
                                     size_t length) override;
@@ -106,6 +109,8 @@
   RiscVState *state_;
   // Semihosting class.
   RiscV32HtifSemiHost *rv32_semihost_ = nullptr;
+  // Action point manager.
+  RiscVActionPointManager *rv_ap_manager_ = nullptr;
   // Breakpoint manager.
   RiscVBreakpointManager *rv_bp_manager_ = nullptr;
   // The pc register instance.

diff --git a/repos.bzl b/repos.bzl
new file mode 100644
index 0000000..3e99542
--- /dev/null
+++ b/repos.bzl

@@ -0,0 +1,28 @@
+# Copyright 2024 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     https://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Load dependent repositories"""
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+def mpact_sim_codelabs_repos():
+    """ Load dependencies needed to use mpact-riscv as a 3rd-party consumer"""
+
+    if not native.existing_rule("com_google_mpact-riscv"):
+        http_archive(
+            name = "com_google_mpact-riscv",
+            sha256 = "d91789e6e8f9437b8f85ace33fe87b94eee510ee68c6c5e5174bec211a1cb29f",
+            strip_prefix = "mpact-riscv-d56ccd7b7ad310c32f0200bc51c022f435e00353",
+            url = "https://github.com/google/mpact-riscv/archive/d56ccd7b7ad310c32f0200bc51c022f435e00353.tar.gz",
+        )

diff --git a/riscv_bin_decoder/BUILD b/riscv_bin_decoder/BUILD
index 7be1267..e13bb17 100644
--- a/riscv_bin_decoder/BUILD
+++ b/riscv_bin_decoder/BUILD

@@ -14,7 +14,7 @@
 
 # Build file for the bin_decoder part of the RiscV instruction decoder codelab.
 
-load("@mpact-sim//mpact/sim/decoder:mpact_sim_isa.bzl", "mpact_bin_fmt_decoder")
+load("@com_google_mpact-sim//mpact/sim/decoder:mpact_sim_isa.bzl", "mpact_bin_fmt_decoder")
 
 package(
     default_applicable_licenses = ["//:license"],

diff --git a/riscv_bin_decoder/solution/BUILD b/riscv_bin_decoder/solution/BUILD
index f7b21a4..d230beb 100644
--- a/riscv_bin_decoder/solution/BUILD
+++ b/riscv_bin_decoder/solution/BUILD

@@ -14,7 +14,7 @@
 
 # Build file for the RiscV binary decoder codelab solution.
 
-load("@mpact-sim//mpact/sim/decoder:mpact_sim_isa.bzl", "mpact_bin_fmt_decoder")
+load("@com_google_mpact-sim//mpact/sim/decoder:mpact_sim_isa.bzl", "mpact_bin_fmt_decoder")
 
 package(
     default_applicable_licenses = ["//:license"],

diff --git a/riscv_dep_repos.bzl b/riscv_dep_repos.bzl
new file mode 100644
index 0000000..90e58d3
--- /dev/null
+++ b/riscv_dep_repos.bzl

@@ -0,0 +1,22 @@
+# Copyright 2024 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     https://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Call the first level dependent repos to load their dependencies."""
+
+load("@com_google_mpact-riscv//:dep_repos.bzl", "mpact_riscv_dep_repos")
+
+def mpact_sim_codelabs_riscv_dep_repos():
+    """ Extra dependencies to finish setting up repositories"""
+
+    mpact_riscv_dep_repos()

diff --git a/riscv_full_decoder/BUILD b/riscv_full_decoder/BUILD
index 7a1f1d0..613f0ad 100644
--- a/riscv_full_decoder/BUILD
+++ b/riscv_full_decoder/BUILD

@@ -34,11 +34,11 @@
         "//riscv_bin_decoder/solution:riscv32i_bin_fmt",
         "//riscv_isa_decoder/solution:riscv32i_isa",
         "//riscv_semantic_functions/solution:riscv32i",
-        "@mpact-sim//mpact/sim/generic:arch_state",
-        "@mpact-sim//mpact/sim/generic:core",
-        "@mpact-sim//mpact/sim/generic:instruction",
-        "@mpact-sim//mpact/sim/generic:program_error",
-        "@mpact-sim//mpact/sim/util/memory",
+        "@com_google_mpact-sim//mpact/sim/generic:arch_state",
+        "@com_google_mpact-sim//mpact/sim/generic:core",
+        "@com_google_mpact-sim//mpact/sim/generic:instruction",
+        "@com_google_mpact-sim//mpact/sim/generic:program_error",
+        "@com_google_mpact-sim//mpact/sim/util/memory",
         "@com_google_absl//absl/container:flat_hash_map",
         "@com_google_absl//absl/functional:any_invocable",
         "@com_google_absl//absl/functional:bind_front",

diff --git a/riscv_full_decoder/solution/BUILD b/riscv_full_decoder/solution/BUILD
index 1212c0e..41820d2 100644
--- a/riscv_full_decoder/solution/BUILD
+++ b/riscv_full_decoder/solution/BUILD

@@ -39,10 +39,10 @@
         "@com_google_absl//absl/functional:bind_front",
         "@com_google_absl//absl/memory",
         "@com_google_absl//absl/strings",
-        "@mpact-sim//mpact/sim/generic:arch_state",
-        "@mpact-sim//mpact/sim/generic:core",
-        "@mpact-sim//mpact/sim/generic:instruction",
-        "@mpact-sim//mpact/sim/generic:program_error",
-        "@mpact-sim//mpact/sim/util/memory",
+        "@com_google_mpact-sim//mpact/sim/generic:arch_state",
+        "@com_google_mpact-sim//mpact/sim/generic:core",
+        "@com_google_mpact-sim//mpact/sim/generic:instruction",
+        "@com_google_mpact-sim//mpact/sim/generic:program_error",
+        "@com_google_mpact-sim//mpact/sim/util/memory",
     ],
 )

diff --git a/riscv_isa_decoder/BUILD b/riscv_isa_decoder/BUILD
index 8963230..05092d2 100644
--- a/riscv_isa_decoder/BUILD
+++ b/riscv_isa_decoder/BUILD

@@ -14,7 +14,7 @@
 
 # Build file for the isa_decoder part of the RiscV instruction decoder codelab.
 
-load("@mpact-sim//mpact/sim/decoder:mpact_sim_isa.bzl", "mpact_isa_decoder")
+load("@com_google_mpact-sim//mpact/sim/decoder:mpact_sim_isa.bzl", "mpact_isa_decoder")
 
 package(
     default_applicable_licenses = ["//:license"],

diff --git a/riscv_isa_decoder/solution/BUILD b/riscv_isa_decoder/solution/BUILD
index c82dfd9..2e55bdf 100644
--- a/riscv_isa_decoder/solution/BUILD
+++ b/riscv_isa_decoder/solution/BUILD

@@ -14,7 +14,7 @@
 
 # Build file for the isa_decoder part of the RiscV instruction decoder codelab solution.
 
-load("@mpact-sim//mpact/sim/decoder:mpact_sim_isa.bzl", "mpact_isa_decoder")
+load("@com_google_mpact-sim//mpact/sim/decoder:mpact_sim_isa.bzl", "mpact_isa_decoder")
 
 package(
     default_applicable_licenses = ["//:license"],

diff --git a/riscv_repos.bzl b/riscv_repos.bzl
new file mode 100644
index 0000000..f2373de
--- /dev/null
+++ b/riscv_repos.bzl

@@ -0,0 +1,22 @@
+# Copyright 2024 Google LLC
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     https://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+"""Call the first level dependent repos to load their dependencies."""
+
+load("@com_google_mpact-riscv//:repos.bzl", "mpact_riscv_repos")
+
+def mpact_sim_codelabs_riscv_repos():
+    """ Extra dependencies to finish setting up repositories"""
+
+    mpact_riscv_repos()

diff --git a/riscv_semantic_functions/BUILD b/riscv_semantic_functions/BUILD
index 73c8cb8..279644b 100644
--- a/riscv_semantic_functions/BUILD
+++ b/riscv_semantic_functions/BUILD

@@ -32,9 +32,9 @@
     copts = ["-O3"],
     deps = [
         "//other:riscv_simple_state",
-        "@mpact-sim//mpact/sim/generic:arch_state",
-        "@mpact-sim//mpact/sim/generic:core",
-        "@mpact-sim//mpact/sim/generic:instruction",
-        "@mpact-sim//mpact/sim/util/memory",
+        "@com_google_mpact-sim//mpact/sim/generic:arch_state",
+        "@com_google_mpact-sim//mpact/sim/generic:core",
+        "@com_google_mpact-sim//mpact/sim/generic:instruction",
+        "@com_google_mpact-sim//mpact/sim/util/memory",
     ],
 )

diff --git a/riscv_semantic_functions/solution/BUILD b/riscv_semantic_functions/solution/BUILD
index 73c8cb8..279644b 100644
--- a/riscv_semantic_functions/solution/BUILD
+++ b/riscv_semantic_functions/solution/BUILD

@@ -32,9 +32,9 @@
     copts = ["-O3"],
     deps = [
         "//other:riscv_simple_state",
-        "@mpact-sim//mpact/sim/generic:arch_state",
-        "@mpact-sim//mpact/sim/generic:core",
-        "@mpact-sim//mpact/sim/generic:instruction",
-        "@mpact-sim//mpact/sim/util/memory",
+        "@com_google_mpact-sim//mpact/sim/generic:arch_state",
+        "@com_google_mpact-sim//mpact/sim/generic:core",
+        "@com_google_mpact-sim//mpact/sim/generic:instruction",
+        "@com_google_mpact-sim//mpact/sim/util/memory",
     ],
 )