Adding a call to the gdb debug info interface.

PiperOrigin-RevId: 914280396
Change-Id: I3287a26e9ddc01589cab0670f1a720a26e5816cc

mpact/sim/generic/debug_info.h

diff --git a/mpact/sim/generic/debug_info.h b/mpact/sim/generic/debug_info.h
index 3c4430b..60c2360 100644
--- a/mpact/sim/generic/debug_info.h
+++ b/mpact/sim/generic/debug_info.h
@@ -45,6 +45,8 @@
   virtual int GetPcRegister() const = 0;
   // Returns the byte width of the general purpose registers.
   virtual int GetGprWidth() const = 0;
+  // Returns the byte width of the program counter register.
+  virtual int GetPcWidth() const = 0;
   // Returns the byte width of the register with the given number.
   virtual int GetRegisterByteWidth(int) const = 0;
   // Returns the XML file describing the target for gdb (or lldb).

mpact/sim/util/gdbserver/gdbserver.cc

diff --git a/mpact/sim/util/gdbserver/gdbserver.cc b/mpact/sim/util/gdbserver/gdbserver.cc
index 173c75c..378f4e5 100644
--- a/mpact/sim/util/gdbserver/gdbserver.cc
+++ b/mpact/sim/util/gdbserver/gdbserver.cc
@@ -549,7 +549,7 @@
   }
   std::string encoded_pc =
       absl::StrCat(absl::Hex(debug_info_.GetPcRegister()), ":",
-                   HexEncodeNumberInTargetEndianness(debug_info_.GetGprWidth(),
+                   HexEncodeNumberInTargetEndianness(debug_info_.GetPcWidth(),
                                                      pc_result.value()),
                    ";");
   auto result = core_debug_interfaces_[thread_id]->GetLastHaltReason();
@@ -734,16 +734,22 @@
     return Respond("T05thread:1;");
   }
   halt_reasons_[0] = result.value();
-  uint64_t address = 0;
+  auto pc_result = core_debug_interfaces_[0]->ReadRegister("pc");
+  if (!pc_result.ok()) {
+    return Respond("E01");
+  }
+  uint64_t address = pc_result.value();
+  std::string encoded_pc = absl::StrCat(
+      absl::Hex(debug_info_.GetPcRegister()), ":",
+      HexEncodeNumberInTargetEndianness(debug_info_.GetPcWidth(), address),
+      ";");
   generic::AccessType access_type = generic::AccessType::kNone;
   switch (halt_reasons_[0]) {
     default:
-      return Respond("T05thread:1;");
+      return Respond(absl::StrCat("T05thread:1;", encoded_pc));
     case *HaltReason::kSoftwareBreakpoint:
       address = core_debug_interfaces_[0]->GetSwBreakpointInfo();
-      return Respond(absl::StrCat("T05thread:1;swbreak:;",
-                                  HexEncodeNumberInTargetEndianness(
-                                      debug_info_.GetGprWidth(), address)));
+      return Respond(absl::StrCat("T05thread:1;swbreak:;", encoded_pc));
     case *HaltReason::kHardwareBreakpoint:
       return Respond("T05thread:1;hwbreak:;");
     case *HaltReason::kDataWatchPoint: {
@@ -754,22 +760,22 @@
       // read/write (awatch) watch points.
       switch (access_type) {
         case generic::AccessType::kLoad:
-          return Respond(absl::StrCat("T05thread:1;rwatch:;", encoded_address));
+          return Respond(absl::StrCat("T05thread:1;rwatch:;", encoded_pc));
         case generic::AccessType::kStore:
-          return Respond(absl::StrCat("T05thread:1;watch:;", encoded_address));
+          return Respond(absl::StrCat("T05thread:1;watch:;", encoded_pc));
         case generic::AccessType::kLoadStore:
-          return Respond(absl::StrCat("T05thread:1;awatch:;", encoded_address));
+          return Respond(absl::StrCat("T05thread:1;awatch:;", encoded_pc));
         default:
           LOG(ERROR) << "Invalid access type: "
                      << static_cast<int>(access_type);
-          return Respond("T05thread:1;;");
+          return Respond(absl::StrCat("T05thread:1;", encoded_pc));
       }
     }
     case *HaltReason::kActionPoint:
     case *HaltReason::kSimulatorError:
-      return Respond("T06thread:1;");
+      return Respond(absl::StrCat("T06thread:1;", encoded_pc));
     case *HaltReason::kUserRequest:
-      return Respond("T03thread:1;");
+      return Respond(absl::StrCat("T03thread:1;", encoded_pc));
     case *HaltReason::kProgramDone:
       return Respond("W00");
   }

mpact/sim/util/gdbserver/test/gdbserver_test.cc

diff --git a/mpact/sim/util/gdbserver/test/gdbserver_test.cc b/mpact/sim/util/gdbserver/test/gdbserver_test.cc
index 15a8d87..4352ef0 100644
--- a/mpact/sim/util/gdbserver/test/gdbserver_test.cc
+++ b/mpact/sim/util/gdbserver/test/gdbserver_test.cc
@@ -120,6 +120,7 @@
   int GetFirstGpr() const override { return 0; }
   int GetLastGpr() const override { return 31; }
   int GetGprWidth() const override { return 64; }
+  int GetPcWidth() const override { return 64; }
   int GetPcRegister() const override { return 32; }
   int GetRegisterByteWidth(int register_number) const override {
     return 64 / 8;