Minor nits and added documentation. PiperOrigin-RevId: 712531889 Change-Id: I0c15a58fb324142cc0c29dac79a0045265d53a6f
diff --git a/mpact/sim/util/asm/MPACT-Sim Assembler.pdf b/mpact/sim/util/asm/MPACT-Sim Assembler.pdf new file mode 100644 index 0000000..e3c2b33 --- /dev/null +++ b/mpact/sim/util/asm/MPACT-Sim Assembler.pdf Binary files differ
diff --git a/mpact/sim/util/asm/simple_assembler.cc b/mpact/sim/util/asm/simple_assembler.cc index f9f948e..f6f1c82 100644 --- a/mpact/sim/util/asm/simple_assembler.cc +++ b/mpact/sim/util/asm/simple_assembler.cc
@@ -488,6 +488,11 @@ return absl::OkStatus(); } +absl::Status SimpleAssembler::SetEntryPoint(uint64_t value) { + entry_point_ = value; + return absl::OkStatus(); +} + // Top level function that writes the ELF file out to disk. absl::Status SimpleAssembler::Write(std::ostream &os) { if (entry_point_.empty()) return absl::NotFoundError("Entry point not set");
diff --git a/mpact/sim/util/asm/simple_assembler.h b/mpact/sim/util/asm/simple_assembler.h index 5250b28..d020583 100644 --- a/mpact/sim/util/asm/simple_assembler.h +++ b/mpact/sim/util/asm/simple_assembler.h
@@ -51,9 +51,8 @@ class SimpleAssembler { public: - explicit SimpleAssembler(int os_abi, int type, int machine, - uint64_t base_address, - OpcodeAssemblerInterface *opcode_assembler_if); + SimpleAssembler(int os_abi, int type, int machine, uint64_t base_address, + OpcodeAssemblerInterface *opcode_assembler_if); SimpleAssembler(const SimpleAssembler &) = delete; SimpleAssembler &operator=(const SimpleAssembler &) = delete; virtual ~SimpleAssembler(); @@ -62,6 +61,7 @@ absl::Status Parse(std::istream &is); // Set the entry point. Either pass a symbol or an address. absl::Status SetEntryPoint(const std::string &value); + absl::Status SetEntryPoint(uint64_t value); // Write out the ELF file. absl::Status Write(std::ostream &os);
diff --git a/mpact/sim/util/asm/test/BUILD b/mpact/sim/util/asm/test/BUILD index 1e7763d..38287ba 100644 --- a/mpact/sim/util/asm/test/BUILD +++ b/mpact/sim/util/asm/test/BUILD
@@ -59,11 +59,9 @@ name = "riscv64x_encoder", testonly = True, srcs = [ - "riscv64x_assembler.cc", "riscv64x_bin_encoder_interface.cc", ], hdrs = [ - "riscv64x_assembler.h", "riscv64x_bin_encoder_interface.h", "riscv_bin_setters.h", "riscv_getter_helpers.h",
diff --git a/mpact/sim/util/asm/test/riscv64x_assembler.cc b/mpact/sim/util/asm/test/riscv64x_assembler.cc deleted file mode 100644 index 9b8efca..0000000 --- a/mpact/sim/util/asm/test/riscv64x_assembler.cc +++ /dev/null
@@ -1,51 +0,0 @@ -// Copyright 2025 Google LLC -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// https://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#include "mpact/sim/util/asm/test/riscv64x_assembler.h" - -#include <cstdint> -#include <tuple> - -#include "absl/log/check.h" -#include "absl/status/statusor.h" -#include "absl/strings/string_view.h" -#include "mpact/sim/util/asm/resolver_interface.h" -#include "mpact/sim/util/asm/test/riscv64x_bin_encoder_interface.h" -#include "mpact/sim/util/asm/test/riscv64x_encoder.h" - -namespace mpact { -namespace sim { -namespace riscv { - -using ::mpact::sim::util::assembler::ResolverInterface; - -RiscV64XAssembler::RiscV64XAssembler() { - bin_encoder_interface_ = new isa64::RiscV64XBinEncoderInterface(); - matcher_ = new isa64::Riscv64xSlotMatcher(bin_encoder_interface_); - CHECK_OK(matcher_->Initialize()); -} - -RiscV64XAssembler::~RiscV64XAssembler() { - delete bin_encoder_interface_; - delete matcher_; -} - -absl::StatusOr<std::tuple<uint64_t, int>> RiscV64XAssembler::Assemble( - uint64_t address, absl::string_view text, ResolverInterface *resolver) { - return matcher_->Encode(address, text, 0, resolver); -} - -} // namespace riscv -} // namespace sim -} // namespace mpact
diff --git a/mpact/sim/util/asm/test/riscv64x_assembler.h b/mpact/sim/util/asm/test/riscv64x_assembler.h deleted file mode 100644 index 14a64f0..0000000 --- a/mpact/sim/util/asm/test/riscv64x_assembler.h +++ /dev/null
@@ -1,54 +0,0 @@ -// Copyright 2025 Google LLC -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// https://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#ifndef MPACT_SIM_UTIL_ASM_TEST_RISCV64X_ASSEMBLER_H_ -#define MPACT_SIM_UTIL_ASM_TEST_RISCV64X_ASSEMBLER_H_ - -#include <cstdint> -#include <tuple> - -#include "absl/status/statusor.h" -#include "absl/strings/string_view.h" -#include "mpact/sim/util/asm/resolver_interface.h" -#include "mpact/sim/util/asm/test/riscv64x_bin_encoder_interface.h" -#include "mpact/sim/util/asm/test/riscv64x_encoder.h" -#include "mpact/sim/util/asm/test/riscv64x_enums.h" - -namespace mpact { -namespace sim { -namespace riscv { - -using ::mpact::sim::util::assembler::ResolverInterface; - -class RiscV64XAssembler { - public: - using SlotEnum = isa64::SlotEnum; - using OpcodeEnum = isa64::OpcodeEnum; - - RiscV64XAssembler(); - virtual ~RiscV64XAssembler(); - - absl::StatusOr<std::tuple<uint64_t, int>> Assemble( - uint64_t address, absl::string_view text, ResolverInterface *resolver); - - private: - isa64::RiscV64XBinEncoderInterface *bin_encoder_interface_ = nullptr; - isa64::Riscv64xSlotMatcher *matcher_ = nullptr; -}; - -} // namespace riscv -} // namespace sim -} // namespace mpact - -#endif // MPACT_SIM_UTIL_ASM_TEST_RISCV64X_ASSEMBLER_H_