mpact/sim/decoder/test/testfiles/instruction_group_errors.bin_fmt

// Copyright 2023 Google LLC
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//     https://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.

decoder InstructionGroupErrors {
  namespace sim::constraints;
  opcode_enum = "sim::OpcodeEnum";
  InstGroup;                        // None such group.
  inst32a;
  inst32a = {inst32a, inst32b};     // Parent group already exists.
  InstGroup1 = {inst32x, inst32b};  // Groups inherit from different formats.
  InstGroup2 = {inst32b, inst32c};  // This one is fine.
  InstGroup2 = {inst32b, inst32c};  // Duplicate group.
  InstGroup3 = {inst32c, inst32c, inst32d};  // Group inst32d does not exist.
  InstGroup4 = {inst32a, inst32d};  // No child groups, since these group idents
                                    // each generate errors.
};

format Inst32Format[32] {
  fields:
    unsigned field0[4];
    unsigned field1[4];
    unsigned field2[4];
    unsigned field3[4];
    unsigned field4[4];
    unsigned field5[4];
    unsigned opcode[3];
    unsigned inst[5];
};

format Inst32Format2[32] {
  fields:
    unsigned bits[28];
    unsigned opcode[4];
};

instruction group inst32a[32] : Inst32Format {
  insta : Inst32Format : opcode == 0b111;
};

instruction group inst32b[32] : Inst32Format2 {
  instb : Inst32Format2 : opcode == 0b0000;
};

instruction group inst32c[32] : Inst32Format2 {
  instc : Inst32Format2 : opcode == 0b0001;
};

instruction group inst32x[32] : Inst32Format {
  inst : Inst2Format : opcode == 0b010;
};